Frank Barth

Person

Radebeul, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Buffering non-posted read commands and responses
- Patent number 8,244,950
- Issue date Aug 14, 2012
- Advanced Micro Devices, Inc.
- Frank Barth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combined command and response on-chip data interface for a computer...
- Patent number 7,519,755
- Issue date Apr 14, 2009
- Advanced Micro Devices, Inc.
- Thomas Kunjan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Message based interrupt table
- Patent number 7,257,658
- Issue date Aug 14, 2007
- Advanced Micro Devices, Inc.
- Joerg Winkler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
ATA and SATA compliant controller
- Patent number 7,225,290
- Issue date May 29, 2007
- Advanced Micro Devices, Inc.
- Frank Barth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Message based transport mechanism for level sensitive interrupts
- Patent number 7,181,559
- Issue date Feb 20, 2007
- Advanced Micro Devices, Inc.
- Frank Barth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ordering rule controlled command storage
- Patent number 7,181,561
- Issue date Feb 20, 2007
- Advanced Micro Devices, Inc.
- Frank Barth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buffer sharing in host controller
- Patent number 7,165,125
- Issue date Jan 16, 2007
- Advanced Micro Devices, Inc.
- Robert Lissel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for configuring a peripheral bus
- Patent number 7,162,554
- Issue date Jan 9, 2007
- Advanced Micro Devices, Inc.
- Terry Lynn Cole
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-chip high speed data interface
- Patent number 7,096,290
- Issue date Aug 22, 2006
- Advanced Micro Devices, Inc.
- Thomas Kunjan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Retry mechanism for blocking interfaces
- Patent number 7,016,994
- Issue date Mar 21, 2006
- Advanced Micro Devices, Inc.
- Joerg Winkler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
ATA/SATA combined controller
- Patent number 6,922,738
- Issue date Jul 26, 2005
- Advanced Micro Devices, Inc.
- Henry Drescher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Debug interface for an event timer apparatus
- Patent number 6,839,654
- Issue date Jan 4, 2005
- Advanced Micro Devices, Inc.
- René Röllig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
In-place operation method and apparatus for minimizing the memory o...
- Patent number 6,718,356
- Issue date Apr 6, 2004
- Advanced Micro Devices, Inc.
- Stephan Rosner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for passing device configuration information t...
- Patent number 6,671,748
- Issue date Dec 30, 2003
- Advanced Micro Devices, Inc.
- Terry Lynn Cole
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
One-hot encoded instruction register for boundary scan test complia...
- Publication number 20060069974
- Publication date Mar 30, 2006
- Advanced Micro Devices, Inc.
- Thomas Herrmann
- G01 - MEASURING TESTING
Information Patent Application
Message based interrupt table
- Publication number 20060047877
- Publication date Mar 2, 2006
- Advanced Micro Devices, Inc.
- Joerg Winkler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Combined command and response on-chip data interface
- Publication number 20060015667
- Publication date Jan 19, 2006
- Advanced Micro Devices, Inc.
- Thomas Kunjan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Message based transport mechanism for level sensitive interrupts
- Publication number 20050144346
- Publication date Jun 30, 2005
- Advanced Micro Devices, Inc.
- Frank Barth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Buffer sharing in host controller
- Publication number 20050120150
- Publication date Jun 2, 2005
- Advanced Micro Devices, Inc.
- Robert Lissel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Ordering rule controlled command storage
- Publication number 20040107306
- Publication date Jun 3, 2004
- Advanced Micro Devices, Inc.
- Frank Barth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Retry mechanism for blocking interfaces
- Publication number 20040024949
- Publication date Feb 5, 2004
- Joerg Winkler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Response reordering mechanism
- Publication number 20040024948
- Publication date Feb 5, 2004
- Joerg Winkler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Buffering non-posted read commands and responses
- Publication number 20040024947
- Publication date Feb 5, 2004
- Frank Barth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Debug interface for an event timer apparatus
- Publication number 20040003027
- Publication date Jan 1, 2004
- Rene Rollig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ATA and SATA compliant controller
- Publication number 20030191872
- Publication date Oct 9, 2003
- Frank Barth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ATA/SATA combined controller
- Publication number 20030191874
- Publication date Oct 9, 2003
- Henry Drescher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
On-chip high speed data interface
- Publication number 20030188071
- Publication date Oct 2, 2003
- Thomas Kunjan
- G06 - COMPUTING CALCULATING COUNTING

Frank Barth

Person

Patents Grantslast 30 patents

Buffering non-posted read commands and responses

Combined command and response on-chip data interface for a computer...

Message based interrupt table

ATA and SATA compliant controller

Message based transport mechanism for level sensitive interrupts

Ordering rule controlled command storage

Buffer sharing in host controller

Method and apparatus for configuring a peripheral bus

On-chip high speed data interface

Retry mechanism for blocking interfaces

ATA/SATA combined controller

Debug interface for an event timer apparatus

In-place operation method and apparatus for minimizing the memory o...

Method and apparatus for passing device configuration information t...

Patents Applicationslast 30 patents

One-hot encoded instruction register for boundary scan test complia...

Message based interrupt table

Combined command and response on-chip data interface

Message based transport mechanism for level sensitive interrupts

Buffer sharing in host controller

Ordering rule controlled command storage

Retry mechanism for blocking interfaces

Response reordering mechanism

Buffering non-posted read commands and responses

Debug interface for an event timer apparatus

ATA and SATA compliant controller

ATA/SATA combined controller

On-chip high speed data interface