Frank Kuechenmeister

Person

Dresden, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Chip module structure and method and system for chip module design...
- Patent number 11,907,623
- Issue date Feb 20, 2024
- GLOBALFOUNDRIES Dresden Module One Limited Liability Company & Co. KG
- Saquib B. Halim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Chip module with robust in-package interconnects
- Patent number 11,804,440
- Issue date Oct 31, 2023
- GLOBALFOUNDRIES U.S. INC.
- Saquib B. Halim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Barrier structure with passage for waveguide in photonic integrated...
- Patent number 11,740,418
- Issue date Aug 29, 2023
- GLOBALFOUNDRIES U.S. INC.
- Nicholas A. Polomoff
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Crackstop structures
- Patent number 11,652,069
- Issue date May 16, 2023
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Ranjan Rajoo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Photonics chips with an edge coupler and a continuous crackstop
- Patent number 11,543,606
- Issue date Jan 3, 2023
- GLOBALFOUNDRIES U.S. INC.
- Nicholas A. Polomoff
- G02 - OPTICS
Information Patent Grant
Articles including bonded metal structures and methods of preparing...
- Patent number 9,570,430
- Issue date Feb 14, 2017
- GLOBALFOUNDRIES, INC.
- Frank Kuechenmeister
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor dies with reduced area consumption
- Patent number 9,478,489
- Issue date Oct 25, 2016
- GLOBALFOUNDRIES Inc.
- Daniel Richter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked semiconductor chips packaging
- Patent number 9,449,907
- Issue date Sep 20, 2016
- Advanced Micro Devices, Inc.
- Lei Fu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pillar structure for use in packaging integrated circuit products a...
- Patent number 8,957,524
- Issue date Feb 17, 2015
- GLOBALFOUNDRIES Inc.
- Dirk Breuer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Assessing thermal mechanical characteristics of complex semiconduct...
- Patent number 8,920,027
- Issue date Dec 30, 2014
- GLOBALFOUNDRIES Inc.
- Michael Grillberger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Technique for forming a passivation layer without a terminal metal
- Patent number 8,841,140
- Issue date Sep 23, 2014
- Advanced Micro Devices, Inc.
- Tobias Letz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate dicing technique for separating semiconductor dies with r...
- Patent number 8,664,025
- Issue date Mar 4, 2014
- GLOBALFOUNDRIES Inc.
- Daniel Richter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package having offset vias
- Patent number 8,624,404
- Issue date Jan 7, 2014
- Advanced Micro Devices, Inc.
- Michael Z. Su
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming bump structures that include a protection layer
- Patent number 8,580,672
- Issue date Nov 12, 2013
- GLOBALFOUNDRIES Inc.
- Frank Kuechenmeister
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and device for fabricating bonding wires on the basis of mic...
- Patent number 8,561,446
- Issue date Oct 22, 2013
- GLOBALFOUNDRIES Inc.
- Matthias Lehr
- B21 - MECHANICAL METAL-WORKING WITHOUT ESSENTIALLY REMOVING MATERIAL PUNCHING...
Information Patent Grant
Assessing metal stack integrity in sophisticated semiconductor devi...
- Patent number 8,479,578
- Issue date Jul 9, 2013
- GLOBALFOUNDRIES Inc.
- Holm Geisler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Back side metallization with superior adhesion in high-performance...
- Patent number 8,384,218
- Issue date Feb 26, 2013
- GLOBALFOUNDRIES Inc.
- Soeren Zenner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System for driving and controlling a movable electrode assembly in...
- Patent number 8,357,268
- Issue date Jan 22, 2013
- Advanced Micro Devices, Inc.
- Michael Pietzner
- C25 - ELECTROLYTIC OR ELECTROPHORETIC PROCESSES APPARATUS THEREFOR
Information Patent Grant
Conductive connection structure with stress reduction arrangement f...
- Patent number 8,293,636
- Issue date Oct 23, 2012
- GLOBALFOUNDRIES, INC.
- Thomas Schulze
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including a die region designed for aluminum-f...
- Patent number 8,283,247
- Issue date Oct 9, 2012
- Advanced Micro Devices, Inc.
- Matthias Lehr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wire bonding on reactive metal surfaces of a metallization of a sem...
- Patent number 8,216,880
- Issue date Jul 10, 2012
- GLOBALFOUNDRIES Inc.
- Matthias Lehr
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Wire bonding on reactive metal surfaces of a metallization of a sem...
- Patent number 8,043,956
- Issue date Oct 25, 2011
- GLOBALFOUNDRIES Inc.
- Matthias Lehr
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Semiconductor device including a reduced stress configuration for m...
- Patent number 8,039,958
- Issue date Oct 18, 2011
- Advanced Micro Devices, Inc.
- Alexander Platz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and method for controlling an electrochemical etch process
- Patent number 7,993,936
- Issue date Aug 9, 2011
- Advanced Micro Devices, Inc.
- Kerstin Siury
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor chip with reinforcement layer and method of making th...
- Patent number 7,897,433
- Issue date Mar 1, 2011
- Advanced Micro Devices, Inc.
- Michael Su
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for decreasing surface delamination of gel-type thermal inte...
- Patent number 7,833,839
- Issue date Nov 16, 2010
- GLOBALFOUNDRIES Inc.
- Maxat Touzelbaev
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming solder balls with a stable oxide layer by contro...
- Patent number 7,829,453
- Issue date Nov 9, 2010
- GLOBALFOUNDRIES Inc.
- Gotthard Jungnickel
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Semiconductor device with gel-type thermal interface material
- Patent number 7,678,615
- Issue date Mar 16, 2010
- Advanced Micro Devices, Inc.
- Maxat Touzelbaev
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Technique for efficiently patterning an underbump metallization lay...
- Patent number 7,585,759
- Issue date Sep 8, 2009
- Advanced Micro Devices, Inc.
- Frank Kuechenmeister
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Technique for forming a copper-based contact layer without a termin...
- Patent number 7,569,937
- Issue date Aug 4, 2009
- Advanced Micro Devices, Inc.
- Frank Kuechenmeister
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
CRACKSTOP STRUCTURES
- Publication number 20230238336
- Publication date Jul 27, 2023
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Ranjan RAJOO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BARRIER STRUCTURE WITH PASSAGE FOR WAVEGUIDE IN PHOTONIC INTEGRATED...
- Publication number 20220308297
- Publication date Sep 29, 2022
- GLOBALFOUNDRIES U.S. Inc.
- Nicholas A. Polomoff
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PHOTONICS CHIPS WITH AN EDGE COUPLER AND A CONTINUOUS CRACKSTOP
- Publication number 20220291464
- Publication date Sep 15, 2022
- GLOBALFOUNDRIES U.S. Inc.
- Nicholas A. Polomoff
- G02 - OPTICS
Information Patent Application
CHIP MODULE WITH ROBUST IN-PACKAGE INTERCONNECTS
- Publication number 20220238448
- Publication date Jul 28, 2022
- GLOBALFOUNDRIES U.S. Inc.
- Saquib B. Halim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP MODULE STRUCTURE AND METHOD AND SYSTEM FOR CHIP MODULE DESIGN...
- Publication number 20220237337
- Publication date Jul 28, 2022
- GLOBALFOUNDRIES Dresden Module One Limited Liability Company & Co. KG
- Saquib B. Halim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CRACKSTOP STRUCTURES
- Publication number 20220181271
- Publication date Jun 9, 2022
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Ranjan RAJOO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ARTICLES INCLUDING BONDED METAL STRUCTURES AND METHODS OF PREPARING...
- Publication number 20150333035
- Publication date Nov 19, 2015
- GLOBALFOUNDRIES, Inc.
- Frank Kuechenmeister
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED SEMICONDUCTOR CHIPS PACKAGING
- Publication number 20150279773
- Publication date Oct 1, 2015
- Advanced Micro Devices, Inc.
- Lei Fu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NOVEL PILLAR STRUCTURE FOR USE IN PACKAGING INTEGRATED CIRCUIT PROD...
- Publication number 20140264890
- Publication date Sep 18, 2014
- GLOBALFOUNDRIES INC.
- Dirk Breuer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DIES WITH REDUCED AREA CONSUMPTION
- Publication number 20140110854
- Publication date Apr 24, 2014
- GLOBALFOUNDRIES INC.
- Daniel Richter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT DEVICES WITH BUMP STRUCTURES THAT INCLUDE A PROT...
- Publication number 20140021604
- Publication date Jan 23, 2014
- GLOBALFOUNDRIES INC.
- Frank Kuechenmeister
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE HAVING OFFSET VIAS
- Publication number 20130341802
- Publication date Dec 26, 2013
- Advanced Micro Devices, Inc.
- Michael Z. Su
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of Forming Bump Structures That Include a Protection Layer
- Publication number 20130099372
- Publication date Apr 25, 2013
- GLOBALFOUNDRIES INC.
- Frank Kuechenmeister
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Metal Features to Reduce Crack-Inducing Stresses in Metallization S...
- Publication number 20130087907
- Publication date Apr 11, 2013
- GLOBALFOUNDRIES INC.
- Matthias U. Lehr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Die Seal for Integrated Circuit Device
- Publication number 20120286397
- Publication date Nov 15, 2012
- GLOBALFOUNDRIES INC.
- Frank Kuechenmeister
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED SEMICONDUCTOR CHIPS PACKAGING
- Publication number 20120193788
- Publication date Aug 2, 2012
- Advanced Micro Devices, Inc.
- Lei Fu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Forming Lead-Free Solder Balls with a Stable Oxide Layer...
- Publication number 20120052677
- Publication date Mar 1, 2012
- GLOBALFOUNDRIES INC.
- Soeren Zenner
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
Substrate Dicing Technique for Separating Semiconductor Dies with R...
- Publication number 20120049379
- Publication date Mar 1, 2012
- GLOBALFOUNDRIES INC.
- Daniel Richter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONDUCTIVE CONNECTION STRUCTURE WITH STRESS REDUCTION ARRANGEMENT F...
- Publication number 20120049343
- Publication date Mar 1, 2012
- Advanced Micro Devices, Inc.
- Thomas Schulze
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Applying Thermal Mechanical Characteristics of Complex Semiconducto...
- Publication number 20120051392
- Publication date Mar 1, 2012
- GLOBALFOUNDRIES INC.
- Michael Grillberger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WIRE BONDING ON REACTIVE METAL SURFACES OF A METALLIZATION OF A SEM...
- Publication number 20120009780
- Publication date Jan 12, 2012
- GLOBALFOUNDRIES Inc.
- Matthias Lehr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ASSESSING METAL STACK INTEGRITY IN SOPHISTICATED SEMICONDUCTOR DEVI...
- Publication number 20110209548
- Publication date Sep 1, 2011
- Holm Geisler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BACK SIDE METALLIZATION WITH SUPERIOR ADHESION IN HIGH-PERFORMANCE...
- Publication number 20110074031
- Publication date Mar 31, 2011
- Soeren Zenner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE HAVING A FILLED TRENCH STRUCTURE AND METHODS F...
- Publication number 20100301460
- Publication date Dec 2, 2010
- GLOBALFOUNDRIES INC.
- Zhen ZHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Chip with Reinforcement Layer
- Publication number 20100207281
- Publication date Aug 19, 2010
- Michael Su
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING A COST-EFFICIENT CHIP-PACKAGE CONNEC...
- Publication number 20100164098
- Publication date Jul 1, 2010
- Frank Kuechenmeister
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND DEVICE FOR FABRICATING BONDING WIRES ON THE BASIS OF MIC...
- Publication number 20100107717
- Publication date May 6, 2010
- Matthias Lehr
- B21 - MECHANICAL METAL-WORKING WITHOUT ESSENTIALLY REMOVING MATERIAL PUNCHING...
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING A REDUCED STRESS CONFIGURATION FOR M...
- Publication number 20100109158
- Publication date May 6, 2010
- Alexander Platz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENHANCED WIRE BOND STABILITY ON REACTIVE METAL SURFACES OF A SEMICO...
- Publication number 20100052137
- Publication date Mar 4, 2010
- Andreas Meyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WIRE BONDING ON REACTIVE METAL SURFACES OF A METALLIZATION OF A SEM...
- Publication number 20090243105
- Publication date Oct 1, 2009
- Matthias Lehr
- H01 - BASIC ELECTRIC ELEMENTS

Frank Kuechenmeister

Person

Patents Grantslast 30 patents

Chip module structure and method and system for chip module design...

Chip module with robust in-package interconnects

Barrier structure with passage for waveguide in photonic integrated...

Crackstop structures

Photonics chips with an edge coupler and a continuous crackstop

Articles including bonded metal structures and methods of preparing...

Semiconductor dies with reduced area consumption

Stacked semiconductor chips packaging

Pillar structure for use in packaging integrated circuit products a...

Assessing thermal mechanical characteristics of complex semiconduct...

Technique for forming a passivation layer without a terminal metal

Substrate dicing technique for separating semiconductor dies with r...

Integrated circuit package having offset vias

Methods of forming bump structures that include a protection layer

Method and device for fabricating bonding wires on the basis of mic...

Assessing metal stack integrity in sophisticated semiconductor devi...

Back side metallization with superior adhesion in high-performance...

System for driving and controlling a movable electrode assembly in...

Conductive connection structure with stress reduction arrangement f...

Semiconductor device including a die region designed for aluminum-f...

Wire bonding on reactive metal surfaces of a metallization of a sem...

Wire bonding on reactive metal surfaces of a metallization of a sem...

Semiconductor device including a reduced stress configuration for m...

System and method for controlling an electrochemical etch process

Semiconductor chip with reinforcement layer and method of making th...

Method for decreasing surface delamination of gel-type thermal inte...

Method for forming solder balls with a stable oxide layer by contro...

Semiconductor device with gel-type thermal interface material

Technique for efficiently patterning an underbump metallization lay...

Technique for forming a copper-based contact layer without a termin...

Patents Applicationslast 30 patents

CRACKSTOP STRUCTURES

BARRIER STRUCTURE WITH PASSAGE FOR WAVEGUIDE IN PHOTONIC INTEGRATED...

PHOTONICS CHIPS WITH AN EDGE COUPLER AND A CONTINUOUS CRACKSTOP

CHIP MODULE WITH ROBUST IN-PACKAGE INTERCONNECTS

CHIP MODULE STRUCTURE AND METHOD AND SYSTEM FOR CHIP MODULE DESIGN...

CRACKSTOP STRUCTURES

ARTICLES INCLUDING BONDED METAL STRUCTURES AND METHODS OF PREPARING...

STACKED SEMICONDUCTOR CHIPS PACKAGING

NOVEL PILLAR STRUCTURE FOR USE IN PACKAGING INTEGRATED CIRCUIT PROD...

SEMICONDUCTOR DIES WITH REDUCED AREA CONSUMPTION

INTEGRATED CIRCUIT DEVICES WITH BUMP STRUCTURES THAT INCLUDE A PROT...

INTEGRATED CIRCUIT PACKAGE HAVING OFFSET VIAS

Methods of Forming Bump Structures That Include a Protection Layer

Metal Features to Reduce Crack-Inducing Stresses in Metallization S...

Die Seal for Integrated Circuit Device

STACKED SEMICONDUCTOR CHIPS PACKAGING

Method for Forming Lead-Free Solder Balls with a Stable Oxide Layer...

Substrate Dicing Technique for Separating Semiconductor Dies with R...

CONDUCTIVE CONNECTION STRUCTURE WITH STRESS REDUCTION ARRANGEMENT F...

Applying Thermal Mechanical Characteristics of Complex Semiconducto...

WIRE BONDING ON REACTIVE METAL SURFACES OF A METALLIZATION OF A SEM...

ASSESSING METAL STACK INTEGRITY IN SOPHISTICATED SEMICONDUCTOR DEVI...

BACK SIDE METALLIZATION WITH SUPERIOR ADHESION IN HIGH-PERFORMANCE...

SEMICONDUCTOR DEVICE HAVING A FILLED TRENCH STRUCTURE AND METHODS F...

Semiconductor Chip with Reinforcement Layer

SEMICONDUCTOR DEVICE INCLUDING A COST-EFFICIENT CHIP-PACKAGE CONNEC...

METHOD AND DEVICE FOR FABRICATING BONDING WIRES ON THE BASIS OF MIC...

SEMICONDUCTOR DEVICE INCLUDING A REDUCED STRESS CONFIGURATION FOR M...

ENHANCED WIRE BOND STABILITY ON REACTIVE METAL SURFACES OF A SEMICO...

WIRE BONDING ON REACTIVE METAL SURFACES OF A METALLIZATION OF A SEM...