Frank S. Smith

Person

Chandler, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus for issuing instructions and reissuing a previous instruc...
- Patent number 6,378,061
- Issue date Apr 23, 2002
- Intel Corporation
- Adrian Carbine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction pipeline sequencer in which state information of an ins...
- Patent number 5,459,845
- Issue date Oct 17, 1995
- Intel Corporation
- Truong Nguyen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Branch look ahead adder for use in an instruction pipeline sequence...
- Patent number 5,454,089
- Issue date Sep 26, 1995
- Intel Corporation
- Truong Nguyen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interface between a register file which arbitrates between a number...
- Patent number 5,428,811
- Issue date Jun 27, 1995
- Intel Corporation
- Glenn J. Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High bandwith output hierarchical memory store including a cache, f...
- Patent number 5,313,605
- Issue date May 17, 1994
- Intel Corporation
- Scott Huck
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor in which multiple instructions are executed in one c...
- Patent number H1291
- Issue date Feb 1, 1994
- Glenn J. Hinton
- 395 -
Information Patent Grant
Method of modifying a microinstruction with operands specified by a...
- Patent number 5,222,244
- Issue date Jun 22, 1993
- Intel Corporation
- Adrian Carbine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for executing different cycle instructions by selectively by...
- Patent number 5,185,872
- Issue date Feb 9, 1993
- Intel Corporation
- James M. Arnold
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Six-way access ported RAM array cell
- Patent number 5,023,844
- Issue date Jun 11, 1991
- Intel Corporation
- James M. Arnold
- G11 - INFORMATION STORAGE

Frank S. Smith

Person

Patents Grantslast 30 patents

Apparatus for issuing instructions and reissuing a previous instruc...

Instruction pipeline sequencer in which state information of an ins...

Branch look ahead adder for use in an instruction pipeline sequence...

Interface between a register file which arbitrates between a number...

High bandwith output hierarchical memory store including a cache, f...

Microprocessor in which multiple instructions are executed in one c...

Method of modifying a microinstruction with operands specified by a...

System for executing different cycle instructions by selectively by...

Six-way access ported RAM array cell