Frank Seliger

Person

Zeitz, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Multi-step deposition of a spacer material for reducing void format...
- Patent number 8,987,103
- Issue date Mar 24, 2015
- GLOBALFOUNDRIES Inc.
- Markus Lenski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhancing integrity of a high-K gate stack by protecting a liner at...
- Patent number 8,932,930
- Issue date Jan 13, 2015
- Advanced Micro Devices, Inc.
- Sven Beyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sophisticated gate electrode structures formed by cap layer removal...
- Patent number 8,765,559
- Issue date Jul 1, 2014
- GLOBALFOUNDRIES Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming a semiconductor device while preventing or reduc...
- Patent number 8,765,542
- Issue date Jul 1, 2014
- GLOBALFOUNDRIES Inc.
- Joachim Patzer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and device for fabricating bonding wires on the basis of mic...
- Patent number 8,561,446
- Issue date Oct 22, 2013
- GLOBALFOUNDRIES Inc.
- Matthias Lehr
- B21 - MECHANICAL METAL-WORKING WITHOUT ESSENTIALLY REMOVING MATERIAL PUNCHING...
Information Patent Grant
Forming semiconductor resistors in a semiconductor device comprisin...
- Patent number 8,338,306
- Issue date Dec 25, 2012
- GLOBALFOUNDRIES Inc.
- Jens Heinrich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stress engineering in a contact level of semiconductor devices by s...
- Patent number 8,338,284
- Issue date Dec 25, 2012
- GLOBALFOUNDRIES Inc.
- Kai Frohberg
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cap removal in a high-k metal gate electrode structure by using a s...
- Patent number 8,329,526
- Issue date Dec 11, 2012
- GLOBALFOUNDRIES Inc.
- Jens Heinrich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhancing integrity of a high-k gate stack by protecting a liner at...
- Patent number 8,329,549
- Issue date Dec 11, 2012
- Advanced Micro Devices Inc.
- Sven Beyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cap layer removal in a high-K metal gate stack by using an etch pro...
- Patent number 8,258,062
- Issue date Sep 4, 2012
- GLOBALFOUNDRIES Inc.
- Ralf Richter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced cap layer integrity in a high-K metal gate stack by using...
- Patent number 7,981,740
- Issue date Jul 19, 2011
- GLOBALFOUNDRIES Inc.
- Markus Lenski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Corner rounding in a replacement gate approach based on a sacrifici...
- Patent number 7,951,677
- Issue date May 31, 2011
- GLOBALFOUNDRIES Inc.
- Jens Heinrich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor substrate thinning method for manufacturing thinned die
- Patent number 7,375,032
- Issue date May 20, 2008
- Advanced Micro Devices, Inc.
- Frank Seliger
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
ENHANCING INTEGRITY OF A HIGH-K GATE STACK BY PROTECTING A LINER AT...
- Publication number 20130157432
- Publication date Jun 20, 2013
- Advanced Micro Devices, Inc.
- Sven BEYER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Sophisticated Gate Electrode Structures Formed by Cap Layer Removal...
- Publication number 20120196417
- Publication date Aug 2, 2012
- GLOBALFOUNDRIES INC.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CAP REMOVAL IN A HIGH-K METAL GATE ELECTRODE STRUCTURE BY USING A S...
- Publication number 20110129980
- Publication date Jun 2, 2011
- Jens Heinrich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CORNER ROUNDING IN A REPLACEMENT GATE APPROACH BASED ON A SACRIFICI...
- Publication number 20110104880
- Publication date May 5, 2011
- Jens Heinrich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FORMING SEMICONDUCTOR RESISTORS IN A SEMICONDUCTOR DEVICE COMPRISIN...
- Publication number 20110073956
- Publication date Mar 31, 2011
- Jens Heinrich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRESS ENGINEERING IN A CONTACT LEVEL OF SEMICONDUCTOR DEVICES BY S...
- Publication number 20110073959
- Publication date Mar 31, 2011
- Kai Frohberg
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENHANCED CAP LAYER INTEGRITY IN A HIGH-K METAL GATE STACK BY USING...
- Publication number 20100330757
- Publication date Dec 30, 2010
- Markus Lenski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CAP LAYER REMOVAL IN A HIGH-K METAL GATE STACK BY USING AN ETCH PRO...
- Publication number 20100330808
- Publication date Dec 30, 2010
- Ralf Richter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-STEP DEPOSITION OF A SPACER MATERIAL FOR REDUCING VOID FORMAT...
- Publication number 20100289083
- Publication date Nov 18, 2010
- Markus Lenski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENHANCING INTEGRITY OF A HIGH-K GATE STACK BY PROTECTING A LINER AT...
- Publication number 20100136762
- Publication date Jun 3, 2010
- Sven Beyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND DEVICE FOR FABRICATING BONDING WIRES ON THE BASIS OF MIC...
- Publication number 20100107717
- Publication date May 6, 2010
- Matthias Lehr
- B21 - MECHANICAL METAL-WORKING WITHOUT ESSENTIALLY REMOVING MATERIAL PUNCHING...
Information Patent Application
Semiconductor substrate thinning method for manufacturing thinned die
- Publication number 20060068595
- Publication date Mar 30, 2006
- Frank Seliger
- H01 - BASIC ELECTRIC ELEMENTS

Frank Seliger

Person

Patents Grantslast 30 patents

Multi-step deposition of a spacer material for reducing void format...

Enhancing integrity of a high-K gate stack by protecting a liner at...

Sophisticated gate electrode structures formed by cap layer removal...

Methods of forming a semiconductor device while preventing or reduc...

Method and device for fabricating bonding wires on the basis of mic...

Forming semiconductor resistors in a semiconductor device comprisin...

Stress engineering in a contact level of semiconductor devices by s...

Cap removal in a high-k metal gate electrode structure by using a s...

Enhancing integrity of a high-k gate stack by protecting a liner at...

Cap layer removal in a high-K metal gate stack by using an etch pro...

Enhanced cap layer integrity in a high-K metal gate stack by using...

Corner rounding in a replacement gate approach based on a sacrifici...

Semiconductor substrate thinning method for manufacturing thinned die

Patents Applicationslast 30 patents

ENHANCING INTEGRITY OF A HIGH-K GATE STACK BY PROTECTING A LINER AT...

Sophisticated Gate Electrode Structures Formed by Cap Layer Removal...

CAP REMOVAL IN A HIGH-K METAL GATE ELECTRODE STRUCTURE BY USING A S...

CORNER ROUNDING IN A REPLACEMENT GATE APPROACH BASED ON A SACRIFICI...

FORMING SEMICONDUCTOR RESISTORS IN A SEMICONDUCTOR DEVICE COMPRISIN...

STRESS ENGINEERING IN A CONTACT LEVEL OF SEMICONDUCTOR DEVICES BY S...

ENHANCED CAP LAYER INTEGRITY IN A HIGH-K METAL GATE STACK BY USING...

CAP LAYER REMOVAL IN A HIGH-K METAL GATE STACK BY USING AN ETCH PRO...

MULTI-STEP DEPOSITION OF A SPACER MATERIAL FOR REDUCING VOID FORMAT...

ENHANCING INTEGRITY OF A HIGH-K GATE STACK BY PROTECTING A LINER AT...

METHOD AND DEVICE FOR FABRICATING BONDING WIRES ON THE BASIS OF MIC...

Semiconductor substrate thinning method for manufacturing thinned die