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Frederic Revenu
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San Carlos, CA, US
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Patents Grants
last 30 patents
Information
Patent Grant
Automated timing closure on circuit designs
Patent number
11,714,950
Issue date
Aug 1, 2023
Xilinx, Inc.
Veeresh Pratap Singh
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Synchronous clock domain crossing skew optimization and multi-clock...
Patent number
11,709,521
Issue date
Jul 25, 2023
Xilinx, Inc.
Frederic Revenu
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Sub-FPGA level compilation platform with adjustable dynamic region...
Patent number
11,681,846
Issue date
Jun 20, 2023
Xilinx, Inc.
Xiaojian Yang
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
System and method for an electronic design tool providing automated...
Patent number
10,867,093
Issue date
Dec 15, 2020
Xilinx, Inc.
John Blaine
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Circuit design implementation using control-set based merging and m...
Patent number
10,242,150
Issue date
Mar 26, 2019
Xilinx, Inc.
Sabyasachi Das
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Programmable integrated circuit design flow using timing-driven pip...
Patent number
9,836,568
Issue date
Dec 5, 2017
Xilinx, Inc.
Ilya K. Ganusov
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
System and method for automated configuration of design constraints
Patent number
8,549,454
Issue date
Oct 1, 2013
Xilinx, Inc.
Raymond Kong
G06 - COMPUTING CALCULATING COUNTING
Patents Applications
last 30 patents
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Patent Application
AUTOMATED TIMING CLOSURE ON CIRCUIT DESIGNS
Publication number
20230034736
Publication date
Feb 2, 2023
Xilinx, Inc.
Veeresh Pratap Singh
G06 - COMPUTING CALCULATING COUNTING