Frederick Carnegie Thompson

Person

Limerick, IE

People

Patents Grantslast 30 patents

Information Patent Grant
Analog-to-digital converter using discrete time comparator and swit...
- Patent number 10,439,572
- Issue date Oct 8, 2019
- Analog Devices Global Unlimited Company
- Frederick Carnegie Thompson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Jitter reduction techniques when using digital PLLs with ADCs and DACs
- Patent number 10,367,516
- Issue date Jul 30, 2019
- Analog Devices Global
- Frederick Carnegie Thompson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Electronic device and integrated circuit comprising a gain control...
- Patent number 9,647,620
- Issue date May 9, 2017
- MediaTek Pte Ltd.
- Patrick Alan O'Connell
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Flash ADC shuffling
- Patent number 8,878,712
- Issue date Nov 4, 2014
- Analog Devices Technology
- John Cullinane
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Bit error rate timer for a dynamic latch
- Patent number 8,860,598
- Issue date Oct 14, 2014
- Analog Devices Technology
- Frederick Carnegie Thompson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Use of a DLL to optimize an ADC performance
- Patent number 8,786,483
- Issue date Jul 22, 2014
- Analog Devices Technology
- Frederick Carnegie Thompson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital to analog converter system and method with multi-level scra...
- Patent number 8,085,177
- Issue date Dec 27, 2011
- MediaTek Singapore Pte Ltd.
- John Jude O'Donnell
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Current steering digital-to-analog converter
- Patent number 7,994,957
- Issue date Aug 9, 2011
- MediaTek Singapore Pte. Ltd.
- John Jude O'Donnell
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
TOPOLOGY DISCOVERY IN MULTIDROP ETHERNET NODES
- Publication number 20240171471
- Publication date May 23, 2024
- Analog Devices International Unlimited Company
- Frederick Carnegie Thompson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
JITTER REDUCTION TECHNIQUES WHEN USING DIGITAL PLLS WITH ADCS AND DACS
- Publication number 20190052281
- Publication date Feb 14, 2019
- ANALOG DEVICES GLOBAL
- Frederick Carnegie Thompson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FLASH ADC SHUFFLING
- Publication number 20140266839
- Publication date Sep 18, 2014
- Analog Devices Technology
- John CULLINANE
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
BIT ERROR RATE TIMER FOR A DYNAMIC LATCH
- Publication number 20140266842
- Publication date Sep 18, 2014
- Analog Devices Technology
- Frederick Carnegie THOMPSON
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ELECTRONIC DEVICE AND INTEGRATED CIRCUIT COMPRISING A GAIN CONTROL...
- Publication number 20110176693
- Publication date Jul 21, 2011
- Patrick Alan O'Connell
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIGITAL TO ANALOG CONVERTER SYSTEM AND METHOD WITH MULTI-LEVEL SCRA...
- Publication number 20110069840
- Publication date Mar 24, 2011
- John Jude O'Donnell
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DOUBLE INTEGRAL METHOD OF POWERING UP OR DOWN A SPEAKER
- Publication number 20110007912
- Publication date Jan 13, 2011
- MEDIATEK SINGAPORE PTE LTD
- Frederick Carnegie Thompson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CURRENT STEERING DIGITAL-TO-ANALOG CONVERTER
- Publication number 20100328124
- Publication date Dec 30, 2010
- MEDIATEK SINGAPORE PTE LTD
- John Jude O'Donnell
- H03 - BASIC ELECTRONIC CIRCUITRY

Frederick Carnegie Thompson

Person

Patents Grantslast 30 patents

Analog-to-digital converter using discrete time comparator and swit...

Jitter reduction techniques when using digital PLLs with ADCs and DACs

Electronic device and integrated circuit comprising a gain control...

Flash ADC shuffling

Bit error rate timer for a dynamic latch

Use of a DLL to optimize an ADC performance

Digital to analog converter system and method with multi-level scra...

Current steering digital-to-analog converter

Patents Applicationslast 30 patents

TOPOLOGY DISCOVERY IN MULTIDROP ETHERNET NODES

JITTER REDUCTION TECHNIQUES WHEN USING DIGITAL PLLS WITH ADCS AND DACS

FLASH ADC SHUFFLING

BIT ERROR RATE TIMER FOR A DYNAMIC LATCH

ELECTRONIC DEVICE AND INTEGRATED CIRCUIT COMPRISING A GAIN CONTROL...

DIGITAL TO ANALOG CONVERTER SYSTEM AND METHOD WITH MULTI-LEVEL SCRA...

DOUBLE INTEGRAL METHOD OF POWERING UP OR DOWN A SPEAKER

CURRENT STEERING DIGITAL-TO-ANALOG CONVERTER