Friedrich Sendig

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Creating and reusing customizable structured interconnects
- Patent number 10,909,300
- Issue date Feb 2, 2021
- Synopsys, Inc.
- Hsiang-Wen Jimmy Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Creating and reusing customizable structured interconnects
- Patent number 10,528,696
- Issue date Jan 7, 2020
- Synopsys, Inc.
- Hsiang-Wen Jimmy Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reuse of extracted layout-dependent effects for circuit design usin...
- Patent number 10,521,535
- Issue date Dec 31, 2019
- Synopsys, Inc.
- Donald John Oriordan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Placement of circuit elements in regions with customized placement...
- Patent number 10,275,560
- Issue date Apr 30, 2019
- Synopsys, Inc.
- Bulent Basaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reuse of extracted layout-dependent effects for circuit design usin...
- Patent number 10,102,324
- Issue date Oct 16, 2018
- Synopsys, Inc.
- Donald John Oriordan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit design using generation and instantiation of cir...
- Patent number 10,078,715
- Issue date Sep 18, 2018
- Synopsys, Inc.
- Friedrich Gunter Kurt Sendig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical, rules-based, general property visualization and editi...
- Patent number 7,367,006
- Issue date Apr 29, 2008
- Cadence Design Systems, Inc.
- Donald J. O'Riordan
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Creating and Reusing Customizable Structured Interconnects
- Publication number 20200089835
- Publication date Mar 19, 2020
- Synopsys, Inc.
- Hsiang-Wen Jimmy Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT DESIGN USING GENERATION AND INSTANTIATION OF CIR...
- Publication number 20180089340
- Publication date Mar 29, 2018
- Synopsys, Inc.
- Friedrich Gunter Kurt Sendig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REUSE OF EXTRACTED LAYOUT-DEPENDENT EFFECTS FOR CIRCUIT DESIGN USIN...
- Publication number 20180068036
- Publication date Mar 8, 2018
- Synopsys, Inc.
- Donald John Oriordan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PLACEMENT OF CIRCUIT ELEMENTS IN REGIONS WITH CUSTOMIZED PLACEMENT...
- Publication number 20170344689
- Publication date Nov 30, 2017
- Synopsys, Inc.
- Bulent Basaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REUSE OF EXTRACTED LAYOUT-DEPENDENT EFFECTS FOR CIRCUIT DESIGN USIN...
- Publication number 20170249400
- Publication date Aug 31, 2017
- Synopsys, Inc.
- Donald John Oriordan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated Circuit Design Using Generation and Instantiation of Cir...
- Publication number 20170249416
- Publication date Aug 31, 2017
- Synopsys, Inc.
- Friedrich Gunter Kurt Sendig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Creating and Reusing Customizable Structured Interconnects
- Publication number 20170249414
- Publication date Aug 31, 2017
- Synopsys, Inc.
- Hsiang-Wen Jimmy Lin
- G06 - COMPUTING CALCULATING COUNTING

Friedrich Sendig

Person

Patents Grantslast 30 patents

Creating and reusing customizable structured interconnects

Creating and reusing customizable structured interconnects

Reuse of extracted layout-dependent effects for circuit design usin...

Placement of circuit elements in regions with customized placement...

Reuse of extracted layout-dependent effects for circuit design usin...

Integrated circuit design using generation and instantiation of cir...

Hierarchical, rules-based, general property visualization and editi...

Patents Applicationslast 30 patents

Creating and Reusing Customizable Structured Interconnects

INTEGRATED CIRCUIT DESIGN USING GENERATION AND INSTANTIATION OF CIR...

REUSE OF EXTRACTED LAYOUT-DEPENDENT EFFECTS FOR CIRCUIT DESIGN USIN...

PLACEMENT OF CIRCUIT ELEMENTS IN REGIONS WITH CUSTOMIZED PLACEMENT...

REUSE OF EXTRACTED LAYOUT-DEPENDENT EFFECTS FOR CIRCUIT DESIGN USIN...

Integrated Circuit Design Using Generation and Instantiation of Cir...

Creating and Reusing Customizable Structured Interconnects