Gad Sheaffer

Person

Haifa, IL

People

Patents Grantslast 30 patents

Information Patent Grant
Augmented reality alteration detector
- Patent number 10,229,523
- Issue date Mar 12, 2019
- EMPIRE TECHNOLOGY DEVELOPMENT LLC
- Gad S. Sheaffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Identification of a photographer based on an image
- Patent number 9,836,650
- Issue date Dec 5, 2017
- EMPIRE TECHNOLOGY DEVELOPMENT LLC
- Shmuel Ur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Registering a user-handler in hardware for transactional memory eve...
- Patent number 9,785,462
- Issue date Oct 10, 2017
- Intel Corporation
- Gad Sheaffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Private memory regions and coherency optimization by controlling sn...
- Patent number 9,767,027
- Issue date Sep 19, 2017
- Microsoft Technology Licensing, LLC
- Jan Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic pinning of virtual pages shared between different type proc...
- Patent number 9,747,221
- Issue date Aug 29, 2017
- Intel Corporation
- Gad Sheaffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient garbage collection and exception handling in a hardware a...
- Patent number 9,658,880
- Issue date May 23, 2017
- Microsoft Technology Licensing, LLC
- Jan Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Augmented reality alteration detector
- Patent number 9,626,773
- Issue date Apr 18, 2017
- EMPIRE TECHNOLOGY DEVELOPMENT LLC
- Gad S. Sheaffer
- G02 - OPTICS
Information Patent Grant
Scheduling computing tasks for multi-processor systems based on res...
- Patent number 9,619,298
- Issue date Apr 11, 2017
- EMPIRE TECHNOLOGY DEVELOPMENT LLC
- Gad S Sheaffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction set architecture-based inter-sequencer communications w...
- Patent number 9,588,771
- Issue date Mar 7, 2017
- Intel Corporation
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Obscuring memory access patterns in conjunction with deadlock detec...
- Patent number 9,524,240
- Issue date Dec 20, 2016
- Intel Corporation
- Shay Gueron
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Handling operating system (OS) transitions in an unbounded transact...
- Patent number 9,477,515
- Issue date Oct 25, 2016
- Intel Corporation
- Koichi Yamada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determining a write operation
- Patent number 9,471,129
- Issue date Oct 18, 2016
- EMPIRE TECHNOLOGY DEVELOPMENT LLC
- Gad Sheaffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction set architecture-based inter-sequencer communications w...
- Patent number 9,459,874
- Issue date Oct 4, 2016
- Intel Corporation
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instance monitor
- Patent number 9,430,350
- Issue date Aug 30, 2016
- EMPIRE TECHNOLOGY DEVELOPMENT LLC
- Shmuel Ur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Remotely controlled crowd-sourced media capture
- Patent number 9,350,909
- Issue date May 24, 2016
- EMPIRE TECHNOLOGY DEVELOPMENT LLC
- Gad S. Sheaffer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Using buffered stores or monitoring to filter redundant transaction...
- Patent number 9,280,397
- Issue date Mar 8, 2016
- Intel Corporation
- Ali-Reza Adl-Tabatabai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanisms to accelerate transactions using buffered stores
- Patent number 9,195,600
- Issue date Nov 24, 2015
- Intel Corporation
- Ali-Reza Adl-Tabatabai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic pinning of virtual pages shared between different type proc...
- Patent number 9,164,923
- Issue date Oct 20, 2015
- Intel Corporation
- Gad Sheaffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital relay for out of network devices
- Patent number 9,100,938
- Issue date Aug 4, 2015
- EMPIRE TECHNOLOGY DEVELOPMENT LLC
- Shmuel Ur
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Instrumentation of hardware assisted transactional memory system
- Patent number 9,092,253
- Issue date Jul 28, 2015
- Microsoft Technology Licensing, LLC
- Martin Taillefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanisms to accelerate transactions using buffered stores
- Patent number 9,069,670
- Issue date Jun 30, 2015
- Intel Corporation
- Ali-Reza Adl-Tabatabai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Acceleration threads on idle OS-visible thread execution units
- Patent number 9,003,421
- Issue date Apr 7, 2015
- Intel Corporation
- Ron Gabor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction set architecture-based inter-sequencer communications w...
- Patent number 8,914,618
- Issue date Dec 16, 2014
- Intel Corporation
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanisms to accelerate transactions using buffered stores
- Patent number 8,886,894
- Issue date Nov 11, 2014
- Intel Corporation
- Ali-Reza Adl-Tabatabai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanisms to accelerate transactions using buffered stores
- Patent number 8,856,466
- Issue date Oct 7, 2014
- Intel Corporation
- Ali-Reza Adl-Tabatabai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using ephemeral stores for fine-grained conflict detection in a har...
- Patent number 8,838,908
- Issue date Sep 16, 2014
- Intel Corporation
- Bratin Saha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technique for using memory attributes
- Patent number 8,812,792
- Issue date Aug 19, 2014
- Intel Corporation
- Quinn A. Jacobson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Private memory regions and coherence optimizations
- Patent number 8,812,796
- Issue date Aug 19, 2014
- Microsoft Corporation
- Jan Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Metaphysical address space for holding lossy metadata in hardware
- Patent number 8,806,101
- Issue date Aug 12, 2014
- Intel Corporation
- Gad Sheaffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Extending cache coherency protocols to support locally buffered data
- Patent number 8,799,582
- Issue date Aug 5, 2014
- Intel Corporation
- Gad Sheaffer
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PRE-POST RETIRE HYBRID HARDWARE LOCK ELISION (HLE) SCHEME
- Publication number 20190065160
- Publication date Feb 28, 2019
- Haitham Akkary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUGMENTED REALITY ALTERATION DETECTOR
- Publication number 20170206692
- Publication date Jul 20, 2017
- EMPIRE TECHNOLOGY DEVELOPMENT LLC
- Gad S. Sheaffer
- B60 - VEHICLES IN GENERAL
Information Patent Application
DETERMINING A WRITE OPERATION
- Publication number 20160371000
- Publication date Dec 22, 2016
- EMPIRE TECHNOLOGY DEVELOPMENT LLC
- Gad SHEAFFER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IDENTIFICATION OF A PHOTOGRAPHER BASED ON AN IMAGE
- Publication number 20160232671
- Publication date Aug 11, 2016
- EMPIRE TECHNOLOGY DEVELOPMENT LLC
- Shmuel Ur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REMOTELY CONTROLLED CROWD-SOURCED MEDIA CAPTURE
- Publication number 20160234287
- Publication date Aug 11, 2016
- EMPIRE TECHNOLOGY DEVELOPMENT LLC
- Gad S. SHEAFFER
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Handling Operating System (Os) Transitions In An Unbounded Transact...
- Publication number 20160216973
- Publication date Jul 28, 2016
- Intel Corporation
- Koichi Yamada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC PINNING OF VIRTUAL PAGES SHARED BETWEEN DIFFERENT TYPE PROC...
- Publication number 20160154742
- Publication date Jun 2, 2016
- Gad Sheaffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Determining A Write Operation
- Publication number 20160041599
- Publication date Feb 11, 2016
- EMPIRE TECHNOLOGY DEVELOPMENT LLC
- Gad Sheaffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCHEDULING COMPUTING TASKS FOR MULTI-PROCESSOR SYSTEMS
- Publication number 20150150019
- Publication date May 28, 2015
- EMPIRE TECHNOLOGY DEVELOPMENT LLC
- Gad S. Sheaffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISMS TO ACCELERATE TRANSACTIONS USING BUFFERED STORES
- Publication number 20150134896
- Publication date May 14, 2015
- Intel Corporation
- ALI-REZA ADL-TABATABAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUGMENTED REALITY ALTERATION DETECTOR
- Publication number 20150070388
- Publication date Mar 12, 2015
- Empire Technology Development, LLC
- Gad S. Sheaffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction Set Architecture-Based Inter-Sequencer Communications W...
- Publication number 20150070368
- Publication date Mar 12, 2015
- Intel Corporation
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Handling Operating System (Os) Transitions In An Unbounded Transact...
- Publication number 20150039869
- Publication date Feb 5, 2015
- Koichi Yamada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Private Memory Regions and Coherence Optimizations
- Publication number 20140325154
- Publication date Oct 30, 2014
- Jan Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTANCE MONITOR
- Publication number 20140289392
- Publication date Sep 25, 2014
- Empire Technology Development, LLC
- Shmuel Ur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REMOTELY CONTROLLED CROWD-SOURCED MEDIA CAPTURE
- Publication number 20140218549
- Publication date Aug 7, 2014
- EMPIRE TECHNOLOGY DEVELOPMENT LLC
- Gad S. Sheaffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MALWARE ATTACK PREVENTION USING BLOCK CODE PERMUTATION
- Publication number 20140165197
- Publication date Jun 12, 2014
- Shmuel Ur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUE FOR USING MEMORY ATTRIBUTES
- Publication number 20140025901
- Publication date Jan 23, 2014
- Quinn A. Jacobson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIGITAL RELAY FOR OUT OF NETWORK DEVICES
- Publication number 20130301516
- Publication date Nov 14, 2013
- EMPIRE TECHNOLOGY DEVELOPMENT LLC
- Shmuel Ur
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
EFFICIENT GARBAGE COLLECTION AND EXCEPTION HANDLING IN A HARDWARE A...
- Publication number 20130238579
- Publication date Sep 12, 2013
- Microsoft Corporation
- Jan Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION SET ARCHITECTURE-BASED INTER-SEQUENCER COMMUNICATIONS W...
- Publication number 20130205122
- Publication date Aug 8, 2013
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OBSCURING MEMORY ACCESS PATTERNS IN CONJUNCTION WITH DEADLOCK DETEC...
- Publication number 20130179643
- Publication date Jul 11, 2013
- Shay Gueron
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mechanisms To Accelerate Transactions Using Buffered Stores
- Publication number 20130046924
- Publication date Feb 21, 2013
- Ali-Reza Adl-Tabatabai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mechanisms To Accelerate Transactions Using Buffered Stores
- Publication number 20130046925
- Publication date Feb 21, 2013
- Ali-Reza Adl-Tabatabai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mechanisms To Accelerate Transactions Using Buffered Stores
- Publication number 20130046947
- Publication date Feb 21, 2013
- Ali-Reza Adl-Tabatabai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATING SYSTEM VIRTUAL MEMORY MANAGEMENT FOR HARDWARE TRANSACTION...
- Publication number 20120284485
- Publication date Nov 8, 2012
- Microsoft Corporation
- Koichi Yamada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USING EPHEMERAL STORES FOR FINE-GRAINED CONFLICT DETECTION IN A HAR...
- Publication number 20120179875
- Publication date Jul 12, 2012
- Bratin Saha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MODEL FOR HARDWARE ATTRIBUTES WITHIN A TRANSACTIONAL MEMORY...
- Publication number 20120159079
- Publication date Jun 21, 2012
- Gad Sheaffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
READ AND WRITE MONITORING ATTRIBUTES IN TRANSACTIONAL MEMORY (TM) S...
- Publication number 20120117334
- Publication date May 10, 2012
- Gad Sheaffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Performing Mode Switching In An Unbounded Transactional Memory (UTM...
- Publication number 20120079215
- Publication date Mar 29, 2012
- Jan Gray
- G06 - COMPUTING CALCULATING COUNTING

Gad Sheaffer

Person

Patents Grantslast 30 patents

Augmented reality alteration detector

Identification of a photographer based on an image

Registering a user-handler in hardware for transactional memory eve...

Private memory regions and coherency optimization by controlling sn...

Dynamic pinning of virtual pages shared between different type proc...

Efficient garbage collection and exception handling in a hardware a...

Augmented reality alteration detector

Scheduling computing tasks for multi-processor systems based on res...

Instruction set architecture-based inter-sequencer communications w...

Obscuring memory access patterns in conjunction with deadlock detec...

Handling operating system (OS) transitions in an unbounded transact...

Determining a write operation

Instruction set architecture-based inter-sequencer communications w...

Instance monitor

Remotely controlled crowd-sourced media capture

Using buffered stores or monitoring to filter redundant transaction...

Mechanisms to accelerate transactions using buffered stores

Dynamic pinning of virtual pages shared between different type proc...

Digital relay for out of network devices

Instrumentation of hardware assisted transactional memory system

Mechanisms to accelerate transactions using buffered stores

Acceleration threads on idle OS-visible thread execution units

Instruction set architecture-based inter-sequencer communications w...

Mechanisms to accelerate transactions using buffered stores

Mechanisms to accelerate transactions using buffered stores

Using ephemeral stores for fine-grained conflict detection in a har...

Technique for using memory attributes

Private memory regions and coherence optimizations

Metaphysical address space for holding lossy metadata in hardware

Extending cache coherency protocols to support locally buffered data

Patents Applicationslast 30 patents

PRE-POST RETIRE HYBRID HARDWARE LOCK ELISION (HLE) SCHEME

AUGMENTED REALITY ALTERATION DETECTOR

DETERMINING A WRITE OPERATION

IDENTIFICATION OF A PHOTOGRAPHER BASED ON AN IMAGE

REMOTELY CONTROLLED CROWD-SOURCED MEDIA CAPTURE

Handling Operating System (Os) Transitions In An Unbounded Transact...

DYNAMIC PINNING OF VIRTUAL PAGES SHARED BETWEEN DIFFERENT TYPE PROC...

Determining A Write Operation

SCHEDULING COMPUTING TASKS FOR MULTI-PROCESSOR SYSTEMS

MECHANISMS TO ACCELERATE TRANSACTIONS USING BUFFERED STORES

AUGMENTED REALITY ALTERATION DETECTOR

Instruction Set Architecture-Based Inter-Sequencer Communications W...

Handling Operating System (Os) Transitions In An Unbounded Transact...

Private Memory Regions and Coherence Optimizations

INSTANCE MONITOR

REMOTELY CONTROLLED CROWD-SOURCED MEDIA CAPTURE

MALWARE ATTACK PREVENTION USING BLOCK CODE PERMUTATION

TECHNIQUE FOR USING MEMORY ATTRIBUTES

DIGITAL RELAY FOR OUT OF NETWORK DEVICES

EFFICIENT GARBAGE COLLECTION AND EXCEPTION HANDLING IN A HARDWARE A...

INSTRUCTION SET ARCHITECTURE-BASED INTER-SEQUENCER COMMUNICATIONS W...

OBSCURING MEMORY ACCESS PATTERNS IN CONJUNCTION WITH DEADLOCK DETEC...

Mechanisms To Accelerate Transactions Using Buffered Stores

Mechanisms To Accelerate Transactions Using Buffered Stores

Mechanisms To Accelerate Transactions Using Buffered Stores

OPERATING SYSTEM VIRTUAL MEMORY MANAGEMENT FOR HARDWARE TRANSACTION...

USING EPHEMERAL STORES FOR FINE-GRAINED CONFLICT DETECTION IN A HAR...

MEMORY MODEL FOR HARDWARE ATTRIBUTES WITHIN A TRANSACTIONAL MEMORY...

READ AND WRITE MONITORING ATTRIBUTES IN TRANSACTIONAL MEMORY (TM) S...

Performing Mode Switching In An Unbounded Transactional Memory (UTM...