Galen Stansell

Person

Kirkland, WA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Anti-fuse latch self-test circuit and method
- Patent number 7,859,925
- Issue date Dec 28, 2010
- Cypress Semiconductor Corporation
- Galen E. Stansell
- G11 - INFORMATION STORAGE
Information Patent Grant
Charge pump circuit and method for phase locked loop
- Patent number 7,777,541
- Issue date Aug 17, 2010
- Cypress Semiconductor Corporation
- Galen E. Stansell
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Well bias architecture for integrated circuit device
- Patent number 7,598,794
- Issue date Oct 6, 2009
- Cypress Semiconductor Corporation
- Galen E. Stansell
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Device and method for sensing programming status of non-volatile me...
- Patent number 7,426,142
- Issue date Sep 16, 2008
- Cypress Semiconductor Corporation
- Galen E. Stansell
- G11 - INFORMATION STORAGE
Information Patent Grant
Anti-fuse latch circuit and method including self-test
- Patent number 7,339,848
- Issue date Mar 4, 2008
- Cypress Semiconductor Corporation
- Galen Stansell
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for converging a control loop
- Patent number 6,798,297
- Issue date Sep 28, 2004
- Cypress Semiconductor Corporation
- King H. Kwan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Robust clock circuit architecture
- Patent number 6,674,332
- Issue date Jan 6, 2004
- Cypress Semiconductor, Corp.
- John J. Wunner
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-modulus counter in modulated frequency synthesis
- Patent number 6,559,726
- Issue date May 6, 2003
- Cypress Semiconductor Corp.
- Galen E. Stansell
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Loadable divide-by-N with fixed duty cycle
- Patent number 6,501,815
- Issue date Dec 31, 2002
- Cypress Semiconductor Corp.
- Galen Stansell
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock generator with programmable two-tone modulation for EMI reduc...
- Patent number 6,373,306
- Issue date Apr 16, 2002
- Cypress Semiconductor Corp.
- Eric N. Mann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock circuit for generating a delay
- Patent number 6,271,702
- Issue date Aug 7, 2001
- Cypress Semiconductor Corp.
- Galen E. Stansell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock generator with programmable two-tone modulation for EMI reduc...
- Patent number 6,175,259
- Issue date Jan 16, 2001
- Cypress Semiconductor Corp.
- Eric N. Mann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Enabling clock signals with a phase locked loop (PLL) lock detect c...
- Patent number 5,886,582
- Issue date Mar 23, 1999
- Cypress Semiconductor Corp.
- Galen E. Stansell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Latching inputs and enabling outputs on bidirectional pins with a p...
- Patent number 5,764,714
- Issue date Jun 9, 1998
- Cypress Semiconductor Corporation
- Galen E. Stansell
- H03 - BASIC ELECTRONIC CIRCUITRY

Galen Stansell

Person

Patents Grantslast 30 patents

Anti-fuse latch self-test circuit and method

Charge pump circuit and method for phase locked loop

Well bias architecture for integrated circuit device

Device and method for sensing programming status of non-volatile me...

Anti-fuse latch circuit and method including self-test

Method and apparatus for converging a control loop

Robust clock circuit architecture

Multi-modulus counter in modulated frequency synthesis

Loadable divide-by-N with fixed duty cycle

Clock generator with programmable two-tone modulation for EMI reduc...

Clock circuit for generating a delay

Clock generator with programmable two-tone modulation for EMI reduc...

Enabling clock signals with a phase locked loop (PLL) lock detect c...

Latching inputs and enabling outputs on bidirectional pins with a p...