Gang Zhang

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Pittsburgh, PA, US

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Patents Grantslast 30 patents

Information Patent Grant
Achieving fast parasitic closure in a radio frequency integrated ci...
- Patent number 7,735,048
- Issue date Jun 8, 2010
- Cadence Design Systems, Inc.
- Gang Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hot-carrier device degradation modeling and extraction methodologies
- Patent number 7,567,891
- Issue date Jul 28, 2009
- Cadence Design Systems, Inc.
- Zhihong Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Analog integrated circuit layout design
- Patent number 7,139,987
- Issue date Nov 21, 2006
- Cadence Design Systems, Inc.
- Gang Zhang
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Hot-Carrier Device Degradation Modeling and Extraction Methodologies
- Publication number 20090299716
- Publication date Dec 3, 2009
- Zhihong Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Analog integrated circuit layout design
- Publication number 20040010764
- Publication date Jan 15, 2004
- Neolinear, Inc.
- Gang Zhang
- G06 - COMPUTING CALCULATING COUNTING