Gary A. Walker

Person

Phoenix, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for managing corruption of flash memory contents
- Patent number 9,785,362
- Issue date Oct 10, 2017
- QUALCOMM Incorporated
- Gary Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for controlling vehicle position and orientation
- Patent number 9,734,583
- Issue date Aug 15, 2017
- Collin Walker
- G05 - CONTROLLING REGULATING
Information Patent Grant
On chip network
- Patent number 7,277,449
- Issue date Oct 2, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Ned D. Garinger
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
On chip network that maximizes interconnect utilization between pro...
- Patent number 7,200,137
- Issue date Apr 3, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Martin L. Dorr
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
On chip network with independent logical and physical layers
- Patent number 7,139,860
- Issue date Nov 21, 2006
- Freescale Semiconductor Inc.
- Gary A. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable on chip network
- Patent number 7,051,150
- Issue date May 23, 2006
- FREESCALE SEMICONDUCTOR, INC.
- Mark W. Naumann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On chip network with memory device address decoding
- Patent number 6,996,651
- Issue date Feb 7, 2006
- FREESCALE SEMICONDUCTOR, INC.
- Ned D. Garinger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for supporting DMA I/O device using PCI bus and PCI-PCI brid...
- Patent number 5,968,144
- Issue date Oct 19, 1999
- VLSI Technology, Inc.
- Gary Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for hot docking a portable computer to a docking...
- Patent number 5,933,609
- Issue date Aug 3, 1999
- VLSI Technology, Inc.
- Gary Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error detection and correction for data stored across multiple byte...
- Patent number 5,909,541
- Issue date Jun 1, 1999
- Honeywell Inc.
- Neil L. Sampson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient soft reset in a personal computer
- Patent number 5,842,012
- Issue date Nov 24, 1998
- VLSI Technology, Inc.
- Gary Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for starting and maintaining a central processing...
- Patent number 5,799,178
- Issue date Aug 25, 1998
- VLSI Technology, Inc.
- Gary Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for effecting a soft reset in a processor devi...
- Patent number 5,784,625
- Issue date Jul 21, 1998
- VLSI Technology, Inc.
- Gary Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for altering the clock frequency to a logic contr...
- Patent number 5,768,571
- Issue date Jun 16, 1998
- VLSI Technology, Inc.
- Gary Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for optimizing performance versus power consumption using ex...
- Patent number 5,754,867
- Issue date May 19, 1998
- VLSI Technology, Inc.
- Gary Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Input/output (I/O) holdoff mechanism for use in a system where I/O...
- Patent number 5,664,213
- Issue date Sep 2, 1997
- VLSI Technology, Inc.
- James C. Steele
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Encoding assertion and de-assertion of interrupt requests and DMA r...
- Patent number 5,634,069
- Issue date May 27, 1997
- VLSI Technology, Inc.
- Gary D. Hicok
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS FOR MANAGING CORRUPTION OF FLASH MEMORY CONTENTS
- Publication number 20170017415
- Publication date Jan 19, 2017
- QUALCOMM TECHNOLOGIES INTERNATIONAL, LTD.
- Gary WALKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR PREVENTING AND MANAGING CORRUPTION OF FLAS...
- Publication number 20160147594
- Publication date May 26, 2016
- QUALCOMM TECHNOLOGIES INTERNATIONAL, LTD.
- Gary WALKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR CONTROLLING VEHICLE POSITION AND ORIENTATION
- Publication number 20150378361
- Publication date Dec 31, 2015
- Collin Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scalable on chip network
- Publication number 20040024946
- Publication date Feb 5, 2004
- Mark W. Naumann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
On chip network with independent logical and physical layers
- Publication number 20040019730
- Publication date Jan 29, 2004
- Gary A. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
On chip network with memory device address decoding
- Publication number 20040019733
- Publication date Jan 29, 2004
- Ned D. Garinger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
On chip network that maximizes interconnect utilization between pro...
- Publication number 20040017807
- Publication date Jan 29, 2004
- Martin L. Dorr
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
On chip network
- Publication number 20040017820
- Publication date Jan 29, 2004
- Ned D. Garinger
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Gary A. Walker

Person

Patents Grantslast 30 patents

Method and apparatus for managing corruption of flash memory contents

Systems and methods for controlling vehicle position and orientation

On chip network

On chip network that maximizes interconnect utilization between pro...

On chip network with independent logical and physical layers

Scalable on chip network

On chip network with memory device address decoding

System for supporting DMA I/O device using PCI bus and PCI-PCI brid...

Method and system for hot docking a portable computer to a docking...

Error detection and correction for data stored across multiple byte...

Efficient soft reset in a personal computer

System and method for starting and maintaining a central processing...

Method and apparatus for effecting a soft reset in a processor devi...

System and method for altering the clock frequency to a logic contr...

Method for optimizing performance versus power consumption using ex...

Input/output (I/O) holdoff mechanism for use in a system where I/O...

Encoding assertion and de-assertion of interrupt requests and DMA r...

Patents Applicationslast 30 patents

METHOD AND APPARATUS FOR MANAGING CORRUPTION OF FLASH MEMORY CONTENTS

METHOD AND APPARATUS FOR PREVENTING AND MANAGING CORRUPTION OF FLAS...

SYSTEMS AND METHODS FOR CONTROLLING VEHICLE POSITION AND ORIENTATION

Scalable on chip network

On chip network with independent logical and physical layers

On chip network with memory device address decoding

On chip network that maximizes interconnect utilization between pro...

On chip network