Gary Lafontant

Person

Elmont, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Enhanced capture pads for through semiconductor vias
- Patent number 9,040,418
- Issue date May 26, 2015
- International Business Machines Corporation
- Mukta G. Farooq
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced capture pads for through semiconductor vias
- Patent number 8,772,949
- Issue date Jul 8, 2014
- International Business Machines Corporation
- Mukta G. Farooq
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structures and methods to reduce maximum current density in a solde...
- Patent number 8,674,506
- Issue date Mar 18, 2014
- International Business Machines Corporation
- Raschid J. Bezama
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure having offset passivation to reduce electro...
- Patent number 8,487,447
- Issue date Jul 16, 2013
- International Business Machines Corporation
- Mario J. Interrante
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structures and methods to reduce maximum current density in a solde...
- Patent number 8,446,006
- Issue date May 21, 2013
- International Business Machines Corporation
- Raschid J. Bezama
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Offset solder vias, methods of manufacturing and design structures
- Patent number 8,298,929
- Issue date Oct 30, 2012
- International Business Machines Corporation
- Timothy H. Daubenspeck
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Enhanced electromigration resistance in TSV structure and design
- Patent number 8,288,270
- Issue date Oct 16, 2012
- International Business Machines Corporation
- Mukta G Farooq
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced electromigration resistance in TSV structure and design
- Patent number 8,237,288
- Issue date Aug 7, 2012
- International Business Machines Corporation
- Mukta G Farooq
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Clearance hole size adjustment for impedance control in multilayer...
- Patent number 7,271,681
- Issue date Sep 18, 2007
- International Business Machines Corporation
- Warren D. Dyckman
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ENHANCED CAPTURE PADS FOR THROUGH SEMICONDUCTOR VIAS
- Publication number 20140124946
- Publication date May 8, 2014
- International Business Machines Corporation
- Mukta G. Farooq
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENHANCED CAPTURE PADS FOR THROUGH SEMICONDUCTOR VIAS
- Publication number 20140127904
- Publication date May 8, 2014
- International Business Machines Corporation
- Mukta G. Farooq
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURES AND METHODS TO REDUCE MAXIMUM CURRENT DENSITY IN A SOLDE...
- Publication number 20130234329
- Publication date Sep 12, 2013
- Intetnational Business Machines Corporation
- Raschid J. BEZAMA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE HAVING OFFSET PASSIVATION TO REDUCE ELECTRO...
- Publication number 20120292779
- Publication date Nov 22, 2012
- International Business Machines Corporation
- MARIO J. INTERRANTE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENHANCED ELECTROMIGRATION RESISTANCE IN TSV STRUCTURE AND DESIGN
- Publication number 20120199975
- Publication date Aug 9, 2012
- International Business Machines Corporation
- Mukta G. Farooq
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENHANCED ELECTROMIGRATION RESISTANCE IN TSV STRUCTURE AND DESIGN
- Publication number 20120199983
- Publication date Aug 9, 2012
- International Business Machines Corporation
- Mukta G. Farooq
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OFFSET SOLDER VIAS, METHODS OF MANUFACTURING AND DESIGN STRUCTURES
- Publication number 20120139123
- Publication date Jun 7, 2012
- International Business Machines Corporation
- Timothy H. Daubenspeck
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTO-ELECTRONIC MODULE WITH IMPROVED LOW POWER, HIGH SPEED ELECTRIC...
- Publication number 20110206379
- Publication date Aug 25, 2011
- International Business Machines Corporation
- Russell A. Budd
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
STRUCTURES AND METHODS TO REDUCE MAXIMUM CURRENT DENSITY IN A SOLDE...
- Publication number 20110147922
- Publication date Jun 23, 2011
- International Business Machines Corporation
- Raschid J. BEZAMA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CLEARANCE HOLE SIZE ADJUSTMENT FOR IMPEDANCE CONTROL IN MULTILAYER...
- Publication number 20070008049
- Publication date Jan 11, 2007
- International Business Machines Corporation
- Warren D. Dyckman
- G06 - COMPUTING CALCULATING COUNTING

Gary Lafontant

Person

Patents Grantslast 30 patents

Enhanced capture pads for through semiconductor vias

Enhanced capture pads for through semiconductor vias

Structures and methods to reduce maximum current density in a solde...

Semiconductor structure having offset passivation to reduce electro...

Structures and methods to reduce maximum current density in a solde...

Offset solder vias, methods of manufacturing and design structures

Enhanced electromigration resistance in TSV structure and design

Enhanced electromigration resistance in TSV structure and design

Clearance hole size adjustment for impedance control in multilayer...

Patents Applicationslast 30 patents

ENHANCED CAPTURE PADS FOR THROUGH SEMICONDUCTOR VIAS

ENHANCED CAPTURE PADS FOR THROUGH SEMICONDUCTOR VIAS

STRUCTURES AND METHODS TO REDUCE MAXIMUM CURRENT DENSITY IN A SOLDE...

SEMICONDUCTOR STRUCTURE HAVING OFFSET PASSIVATION TO REDUCE ELECTRO...

ENHANCED ELECTROMIGRATION RESISTANCE IN TSV STRUCTURE AND DESIGN

ENHANCED ELECTROMIGRATION RESISTANCE IN TSV STRUCTURE AND DESIGN

OFFSET SOLDER VIAS, METHODS OF MANUFACTURING AND DESIGN STRUCTURES

OPTO-ELECTRONIC MODULE WITH IMPROVED LOW POWER, HIGH SPEED ELECTRIC...

STRUCTURES AND METHODS TO REDUCE MAXIMUM CURRENT DENSITY IN A SOLDE...

CLEARANCE HOLE SIZE ADJUSTMENT FOR IMPEDANCE CONTROL IN MULTILAYER...