Gary Shen

Person

Yonghe City, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Process for controlling shallow trench isolation step height
- Patent number 9,054,025
- Issue date Jun 9, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Su-Chen Lai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Photo alignment mark for a gate last process
- Patent number 8,598,630
- Issue date Dec 3, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Gary Shen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chemical mechanical polishing (CMP) method for gate last process
- Patent number 8,390,072
- Issue date Mar 5, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Harry Chuang
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
High-k metal gate CMOS patterning method
- Patent number 8,349,680
- Issue date Jan 8, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kong-Beng Thei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3-dimensional device design layout
- Patent number 8,286,114
- Issue date Oct 9, 2012
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Harry Chuang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for a gate last process
- Patent number 7,985,690
- Issue date Jul 26, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kong-Beng Thei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chemical mechanical polishing (CMP) method for gate last process
- Patent number 7,981,801
- Issue date Jul 19, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Harry Chuang
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method for gap filling in a gate last process
- Patent number 7,923,321
- Issue date Apr 12, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Su-Chen Lai
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
CHEMICAL MECHANICAL POLISHING (CMP) METHOD FOR GATE LAST PROCESS
- Publication number 20110233683
- Publication date Sep 29, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Harry Chuang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR A GATE LAST PROCESS
- Publication number 20100311231
- Publication date Dec 9, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kong-Beng Thei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NOVEL PROCESS FOR CONTROLLING SHALLOW TRENCH ISOLATION STEP HEIGHT
- Publication number 20100112732
- Publication date May 6, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Su-Chen Lai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR GAP FILLING IN A GATE LAST PROCESS
- Publication number 20100112798
- Publication date May 6, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Su-Chen Lai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PHOTO ALIGNMENT MARK FOR A GATE LAST PROCESS
- Publication number 20100084715
- Publication date Apr 8, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Gary Shen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHEMICAL MECHANICAL POLISHING (CMP) METHOD FOR GATE LAST PROCESS
- Publication number 20100065915
- Publication date Mar 18, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Harry Chuang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NOVEL HIGH-K METAL GATE CMOS PATTERNING METHOD
- Publication number 20100048013
- Publication date Feb 25, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kong-Beng Thei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3-Dimensional Device Design Layout
- Publication number 20080263492
- Publication date Oct 23, 2008
- Harry Chuang
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

Process for controlling shallow trench isolation step height

Photo alignment mark for a gate last process

Chemical mechanical polishing (CMP) method for gate last process

High-k metal gate CMOS patterning method

3-dimensional device design layout

Method for a gate last process

Chemical mechanical polishing (CMP) method for gate last process

Method for gap filling in a gate last process

Patents Applicationslast 30 patents

CHEMICAL MECHANICAL POLISHING (CMP) METHOD FOR GATE LAST PROCESS

METHOD FOR A GATE LAST PROCESS

NOVEL PROCESS FOR CONTROLLING SHALLOW TRENCH ISOLATION STEP HEIGHT

METHOD FOR GAP FILLING IN A GATE LAST PROCESS

PHOTO ALIGNMENT MARK FOR A GATE LAST PROCESS

CHEMICAL MECHANICAL POLISHING (CMP) METHOD FOR GATE LAST PROCESS

NOVEL HIGH-K METAL GATE CMOS PATTERNING METHOD

3-Dimensional Device Design Layout