Gary W. Tietz

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San Jose, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Edge transition insensitive delay line system and method
- Patent number 4,984,255
- Issue date Jan 8, 1991
- National Semiconductor Corporation
- Craig M. Davis
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital phase comparator/charge pump with zero deadband and minimum...
- Patent number 4,814,726
- Issue date Mar 21, 1989
- National Semiconductor Corporation
- David A. Byrd
- G01 - MEASURING TESTING
Information Patent Grant
Emitter coupled logic master-slave flip-flop with emitter-follower...
- Patent number 4,193,007
- Issue date Mar 11, 1980
- National Semiconductor Corporation
- Gary W. Tietz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital logic level signal indication of phase and frequency lock c...
- Patent number 4,122,405
- Issue date Oct 24, 1978
- National Semiconductor Corporation
- Gary William Tietz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit for squaring the transfer characteristics of a TTL gate
- Patent number 4,045,689
- Issue date Aug 30, 1977
- National Semiconductor Corporation
- Gary W. Tietz
- H03 - BASIC ELECTRONIC CIRCUITRY