Gaurav Porwal

Person

Bangalore, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Device, system, and method to concurrently store multiple PMON coun...
- Patent number 12,044,730
- Issue date Jul 23, 2024
- Intel Corporation
- Gaurav Porwal
- G01 - MEASURING TESTING
Information Patent Grant
Serializing machine check exceptions for predictive failure analysis
- Patent number 11,687,391
- Issue date Jun 27, 2023
- Intel Corporation
- Gaurav Porwal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Serializing machine check exceptions for predictive failure analysis
- Patent number 11,163,623
- Issue date Nov 2, 2021
- Intel Corporation
- Gaurav Porwal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Delayed error processing
- Patent number 10,929,232
- Issue date Feb 23, 2021
- Intel Corporation
- Subhankar Panda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disambiguation of error logging during system reset
- Patent number 10,824,493
- Issue date Nov 3, 2020
- Intel Corporation
- Subhankar Panda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for vectored machine check bank reporting
- Patent number 10,824,496
- Issue date Nov 3, 2020
- Intel Corporation
- Subhankar Panda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Serializing machine check exceptions for predictive failure analysis
- Patent number 10,671,465
- Issue date Jun 2, 2020
- Intel Corporation
- Gaurav Porwal
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SERIALIZING MACHINE CHECK EXCEPTIONS FOR PREDICTIVE FAILURE ANALYSIS
- Publication number 20220229714
- Publication date Jul 21, 2022
- Intel Corporation
- Gaurav Porwal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEVICE, SYSTEM, AND METHOD TO CONCURRENTLY STORE MULTIPLE PMON COUN...
- Publication number 20220196733
- Publication date Jun 23, 2022
- Intel Corporation
- Gaurav Porwal
- G01 - MEASURING TESTING
Information Patent Application
SERIALIZING MACHINE CHECK EXCEPTIONS FOR PREDICTIVE FAILURE ANALYSIS
- Publication number 20200301773
- Publication date Sep 24, 2020
- Intel Corporation
- Gaurav Porwal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR VECTORED MACHINE CHECK BANK REPORTING
- Publication number 20190205201
- Publication date Jul 4, 2019
- Intel Corporation
- Subhankar Panda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DELAYED ERROR PROCESSING
- Publication number 20180349231
- Publication date Dec 6, 2018
- Intel Corporation
- Subhankar Panda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISAMBIGUATION OF ERROR LOGGING DURING SYSTEM RESET
- Publication number 20180341537
- Publication date Nov 29, 2018
- Intel Corporation
- Subhankar Panda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SERIALIZING MACHINE CHECK EXCEPTIONS FOR PREDICTIVE FAILURE ANALYSIS
- Publication number 20180150345
- Publication date May 31, 2018
- Intel Corporation
- Gaurav Porwal
- G06 - COMPUTING CALCULATING COUNTING

Gaurav Porwal

Person

Patents Grantslast 30 patents

Device, system, and method to concurrently store multiple PMON coun...

Serializing machine check exceptions for predictive failure analysis

Serializing machine check exceptions for predictive failure analysis

Delayed error processing

Disambiguation of error logging during system reset

Apparatus and method for vectored machine check bank reporting

Serializing machine check exceptions for predictive failure analysis

Patents Applicationslast 30 patents

SERIALIZING MACHINE CHECK EXCEPTIONS FOR PREDICTIVE FAILURE ANALYSIS

DEVICE, SYSTEM, AND METHOD TO CONCURRENTLY STORE MULTIPLE PMON COUN...

SERIALIZING MACHINE CHECK EXCEPTIONS FOR PREDICTIVE FAILURE ANALYSIS

APPARATUS AND METHOD FOR VECTORED MACHINE CHECK BANK REPORTING

DELAYED ERROR PROCESSING

DISAMBIGUATION OF ERROR LOGGING DURING SYSTEM RESET

SERIALIZING MACHINE CHECK EXCEPTIONS FOR PREDICTIVE FAILURE ANALYSIS