Gautam Bhatia

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Techniques for transferring commands to a dynamic random-access memory
- Patent number 12,353,767
- Issue date Jul 8, 2025
- NVIDIA Corporation
- Robert Bloemer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error detection pin encoding scheme to avoid maximum transitions an...
- Patent number 12,347,508
- Issue date Jul 1, 2025
- NVIDIA Corp.
- Sunil Sudhakaran
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for data scrambling on a memory interface
- Patent number 12,298,845
- Issue date May 13, 2025
- NVIDIA Corporation
- Gautam Bhatia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware-efficient PAM-3 encoder and decoder
- Patent number 12,197,281
- Issue date Jan 14, 2025
- NVIDIA Corp.
- Gautam Bhatia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for reducing DRAM power usage in performing read and wri...
- Patent number 12,142,344
- Issue date Nov 12, 2024
- NVIDIA Corporation
- Gautam Bhatia
- G11 - INFORMATION STORAGE
Information Patent Grant
Hardware-efficient PAM-3 encoder and decoder
- Patent number 12,135,607
- Issue date Nov 5, 2024
- NVIDIA Corp.
- Gautam Bhatia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for transferring commands to a dynamic random-access memory
- Patent number 11,861,229
- Issue date Jan 2, 2024
- NVIDIA Corporation
- Robert Bloemer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for performing write training on a dynamic random-access...
- Patent number 11,809,719
- Issue date Nov 7, 2023
- NVIDIA Corporation
- Gautam Bhatia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for performing command address in interface training on...
- Patent number 11,742,006
- Issue date Aug 29, 2023
- NVIDIA Corporation
- Robert Bloemer
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for performing write training on a dynamic random-access...
- Patent number 11,742,007
- Issue date Aug 29, 2023
- NVIDIA Corporation
- Gautam Bhatia
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for data scrambling on a memory interface
- Patent number 11,573,854
- Issue date Feb 7, 2023
- NVIDIA Corporation
- Gautam Bhatia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptation of crossing DFE tap weight
- Patent number 9,762,381
- Issue date Sep 12, 2017
- NVIDIA Corporation
- Lizhi Zhong
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Flexible threshold counter for clock-and-data recovery
- Patent number 9,184,907
- Issue date Nov 10, 2015
- NVIDIA Corporation
- Peter C. Mills
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
TECHNIQUES FOR DATA SCRAMBLING ON A MEMORY INTERFACE
- Publication number 20250238314
- Publication date Jul 24, 2025
- NVIDIA Corporation
- Gautam BHATIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR PERFORMING WRITE TRAINING ON A DYNAMIC RANDOM-ACCESS...
- Publication number 20240111435
- Publication date Apr 4, 2024
- NVIDIA Corporation
- Gautam BHATIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR TRANSFERRING COMMANDS TO A DYNAMIC RANDOM-ACCESS MEMORY
- Publication number 20240069812
- Publication date Feb 29, 2024
- NVIDIA Corporation
- Robert BLOEMER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE-EFFICIENT PAM-3 ENCODER AND DECODER
- Publication number 20230418705
- Publication date Dec 28, 2023
- NVIDIA Corp.
- Gautam Bhatia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE-EFFICIENT PAM-3 ENCODER AND DECODER
- Publication number 20230297466
- Publication date Sep 21, 2023
- NVIDIA Corp.
- Gautam Bhatia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR DATA SCRAMBLING ON A MEMORY INTERFACE
- Publication number 20230195561
- Publication date Jun 22, 2023
- NVIDIA Corporation
- Gautam BHATIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR REDUCING DRAM POWER USAGE IN PERFORMING READ AND WRI...
- Publication number 20230124767
- Publication date Apr 20, 2023
- NVIDIA Corporation
- Gautam BHATIA
- G11 - INFORMATION STORAGE
Information Patent Application
ERROR DETECTION PIN ENCODING SCHEME TO AVOID MAXIMUM TRANSITIONS AN...
- Publication number 20220262447
- Publication date Aug 18, 2022
- NVIDIA Corp.
- Sunil Sudhakaran
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR PERFORMING WRITE TRAINING ON A DYNAMIC RANDOM-ACCESS...
- Publication number 20220244863
- Publication date Aug 4, 2022
- NVIDIA Corporation
- Gautam BHATIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR DATA SCRAMBLING ON A MEMORY INTERFACE
- Publication number 20220245025
- Publication date Aug 4, 2022
- NVIDIA Corporation
- Gautam BHATIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR TRANSFERRING COMMANDS TO A DYNAMIC RANDOM-ACCESS MEMORY
- Publication number 20220244890
- Publication date Aug 4, 2022
- NVIDIA Corporation
- Robert BLOEMER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR PERFORMING COMMAND ADDRESS INTERFACE TRAINING ON A D...
- Publication number 20220246183
- Publication date Aug 4, 2022
- NVIDIA Corporation
- Robert BLOEMER
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR PERFORMING WRITE TRAINING ON A DYNAMIC RANDOM-ACCESS...
- Publication number 20220246184
- Publication date Aug 4, 2022
- NVIDIA Corporation
- Gautam BHATIA
- G11 - INFORMATION STORAGE
Information Patent Application
ADAPTATION OF CROSSING DFE TAP WEIGHT
- Publication number 20150010047
- Publication date Jan 8, 2015
- NVIDIA Corporation
- Lizhi ZHONG
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
BACK CHANNEL ADAPTATION FOR TRANSMISSION UNDER PEAK POWER CONSTRAINTS
- Publication number 20140314138
- Publication date Oct 23, 2014
- NVIDIA Corporation
- Lizhi ZHONG
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
FLEXIBLE THRESHOLD COUNTER FOR CLOCK-AND-DATA RECOVERY
- Publication number 20140185633
- Publication date Jul 3, 2014
- NVIDIA Corporation
- Peter C. Mills
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Internal Logic Analyzer with Programmable Window Capture
- Publication number 20140164847
- Publication date Jun 12, 2014
- NVIDIA Corporation
- Peter C. Mills
- G06 - COMPUTING CALCULATING COUNTING

Gautam Bhatia

Person

Patents Grantslast 30 patents

Techniques for transferring commands to a dynamic random-access memory

Error detection pin encoding scheme to avoid maximum transitions an...

Techniques for data scrambling on a memory interface

Hardware-efficient PAM-3 encoder and decoder

Techniques for reducing DRAM power usage in performing read and wri...

Hardware-efficient PAM-3 encoder and decoder

Techniques for transferring commands to a dynamic random-access memory

Techniques for performing write training on a dynamic random-access...

Techniques for performing command address in interface training on...

Techniques for performing write training on a dynamic random-access...

Techniques for data scrambling on a memory interface

Adaptation of crossing DFE tap weight

Flexible threshold counter for clock-and-data recovery

Patents Applicationslast 30 patents

TECHNIQUES FOR DATA SCRAMBLING ON A MEMORY INTERFACE

TECHNIQUES FOR PERFORMING WRITE TRAINING ON A DYNAMIC RANDOM-ACCESS...

TECHNIQUES FOR TRANSFERRING COMMANDS TO A DYNAMIC RANDOM-ACCESS MEMORY

HARDWARE-EFFICIENT PAM-3 ENCODER AND DECODER

HARDWARE-EFFICIENT PAM-3 ENCODER AND DECODER

TECHNIQUES FOR DATA SCRAMBLING ON A MEMORY INTERFACE

TECHNIQUES FOR REDUCING DRAM POWER USAGE IN PERFORMING READ AND WRI...

ERROR DETECTION PIN ENCODING SCHEME TO AVOID MAXIMUM TRANSITIONS AN...

TECHNIQUES FOR PERFORMING WRITE TRAINING ON A DYNAMIC RANDOM-ACCESS...

TECHNIQUES FOR DATA SCRAMBLING ON A MEMORY INTERFACE

TECHNIQUES FOR TRANSFERRING COMMANDS TO A DYNAMIC RANDOM-ACCESS MEMORY

TECHNIQUES FOR PERFORMING COMMAND ADDRESS INTERFACE TRAINING ON A D...

TECHNIQUES FOR PERFORMING WRITE TRAINING ON A DYNAMIC RANDOM-ACCESS...

ADAPTATION OF CROSSING DFE TAP WEIGHT

BACK CHANNEL ADAPTATION FOR TRANSMISSION UNDER PEAK POWER CONSTRAINTS

FLEXIBLE THRESHOLD COUNTER FOR CLOCK-AND-DATA RECOVERY

Internal Logic Analyzer with Programmable Window Capture