Geng ZHONG

Follow

Person

Suzhou, CN

People

Patents Grantslast 30 patents

Information Patent Grant
Method of validating timing issues in gate-level simulation
- Patent number 9,104,829
- Issue date Aug 11, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Jian Zhou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for verifying digital to analog converter design
- Patent number 8,826,205
- Issue date Sep 2, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Cheng Wang
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
METHOD OF VALIDATING TIMING ISSUES IN GATE-LEVEL SIMULATION
- Publication number 20150135153
- Publication date May 14, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Jian Zhou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR VERIFYING DIGITAL TO ANALOG CONVERTER DESIGN
- Publication number 20140115549
- Publication date Apr 24, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Cheng Wang
- G06 - COMPUTING CALCULATING COUNTING