TREA

Gensoh Matsubara

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  • Tokyo, JP
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Patents Grantslast 30 patents

  • Information Patent Grant

    Semiconductor integrated circuit device
    • Patent number 6,215,159
    • Issue date Apr 10, 2001
    • Kabushiki Kaisha Toshiba
    • Tetsuya Fujita
    • G05 - CONTROLLING REGULATING
  • Information Patent Grant

    Logic circuit
    • Patent number 6,133,761
    • Issue date Oct 17, 2000
    • Kabushiki Kaisha Toshiba
    • Gensoh Matsubara
    • G06 - COMPUTING CALCULATING COUNTING
  • Information Patent Grant

    High-speed division and square root calculation unit
    • Patent number 5,798,955
    • Issue date Aug 25, 1998
    • Kabushiki Kaisha Toshiba
    • Gensoh Matsubara
    • G06 - COMPUTING CALCULATING COUNTING