George B. Jamison

Person

Murphy, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
High performance and reduced area architecture for a fully parallel...
- Patent number 7,170,769
- Issue date Jan 30, 2007
- Texas Instruments Incorporated
- Rashmi Sachan
- G11 - INFORMATION STORAGE
Information Patent Grant
Low-power SRAM E-fuse repair methodology
- Patent number 7,152,187
- Issue date Dec 19, 2006
- Texas Instruments Incorporated
- Tam Minh Tran
- G11 - INFORMATION STORAGE
Information Patent Grant
High density memory array
- Patent number 7,042,030
- Issue date May 9, 2006
- Texas Instruments Incorporated
- Suresh Balasuramanian
- G11 - INFORMATION STORAGE
Information Patent Grant
Ultra low-power data retention latch
- Patent number 6,965,261
- Issue date Nov 15, 2005
- Texas Instruments Incorporated
- Tam Minh Tran
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Leakage current reduction method
- Patent number 6,956,398
- Issue date Oct 18, 2005
- Texas Instruments Incorporated
- Hugh Mair
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and system for power conservation in memory devices
- Patent number 6,731,564
- Issue date May 4, 2004
- Texas Instruments Incorporated
- Tam M. Tran
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and method for handling out of range addresses
- Patent number 6,414,900
- Issue date Jul 2, 2002
- Texas Instruments Incorporated
- Stephen W. Spriggs
- G11 - INFORMATION STORAGE
Information Patent Grant
Self-timed memory reset circuitry
- Patent number 6,201,757
- Issue date Mar 13, 2001
- Texas Instruments Incorporated
- M. Dwayne Ward
- G11 - INFORMATION STORAGE
Information Patent Grant
Static memory with low power write port
- Patent number 6,005,794
- Issue date Dec 21, 1999
- Texas Instruments Incorporated
- Bryan D. Sheffield
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Write assist for latch and memory circuits
- Publication number 20070081379
- Publication date Apr 12, 2007
- Texas Instruments, Inc.
- Michael Patrick Clinton
- G11 - INFORMATION STORAGE
Information Patent Application
LEAKAGE CURRENT REDUCTION METHOD
- Publication number 20050212554
- Publication date Sep 29, 2005
- Hugh Mair
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Low-power SRAM E-fuse repair methodology
- Publication number 20050132255
- Publication date Jun 16, 2005
- Tam Minh Tran
- G11 - INFORMATION STORAGE
Information Patent Application
High density memory array
- Publication number 20050111250
- Publication date May 26, 2005
- TEXAS INSTRUMENTS INCORPORATED
- Suresh Balasuramanian
- G11 - INFORMATION STORAGE
Information Patent Application
Ultra low-power data retention latch
- Publication number 20050104643
- Publication date May 19, 2005
- Tam Minh Tran
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MEMORY DEVICE AND METHOD FOR HANDLING OUT OF RANGE ADDRESSES
- Publication number 20020085444
- Publication date Jul 4, 2002
- Stephen W. Spriggs
- G11 - INFORMATION STORAGE

George B. Jamison

Person

Patents Grantslast 30 patents

High performance and reduced area architecture for a fully parallel...

Low-power SRAM E-fuse repair methodology

High density memory array

Ultra low-power data retention latch

Leakage current reduction method

Method and system for power conservation in memory devices

Memory device and method for handling out of range addresses

Self-timed memory reset circuitry

Static memory with low power write port

Patents Applicationslast 30 patents

Write assist for latch and memory circuits

LEAKAGE CURRENT REDUCTION METHOD

Low-power SRAM E-fuse repair methodology

High density memory array

Ultra low-power data retention latch

MEMORY DEVICE AND METHOD FOR HANDLING OUT OF RANGE ADDRESSES