George Kong Yiu

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Cache used both as cache and staging buffer
- Patent number 8,176,257
- Issue date May 8, 2012
- Apple Inc.
- Ruchi Wadhawan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-blocking address switch with shallow per agent queues
- Patent number 7,970,970
- Issue date Jun 28, 2011
- Apple Inc.
- Sridhar P. Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache used both as cache and staging buffer
- Patent number 7,949,829
- Issue date May 24, 2011
- Apple Inc.
- Ruchi Wadhawan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-blocking address switch with shallow per agent queues
- Patent number 7,752,366
- Issue date Jul 6, 2010
- Apple Inc.
- Sridhar P. Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache used both as cache and staging buffer
- Patent number 7,624,235
- Issue date Nov 24, 2009
- Apple Inc.
- Ruchi Wadhawan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-blocking address switch with shallow per agent queues
- Patent number 7,461,190
- Issue date Dec 2, 2008
- P.A. Semi, Inc.
- Sridhar P. Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Segmented interconnect for connecting multiple agents in a system
- Patent number 7,426,601
- Issue date Sep 16, 2008
- P.A. Semi, Inc.
- Sridhar P. Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Segmented interconnect for connecting multiple agents in a system
- Patent number 7,269,682
- Issue date Sep 11, 2007
- P.A. Semi, Inc.
- Sridhar P. Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Content addressable memory with power reduction technique
- Patent number 6,785,152
- Issue date Aug 31, 2004
- Broadcom Corporation
- George Kong Yiu
- G11 - INFORMATION STORAGE
Information Patent Grant
Content addressable memory with power reduction technique
- Patent number 6,646,899
- Issue date Nov 11, 2003
- Broadcom Corporation
- George Kong Yiu
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Cache Used Both as Cache and Staging Buffer
- Publication number 20110197033
- Publication date Aug 11, 2011
- Ruchi Wadhawan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Non-blocking Address Switch with Shallow Per Agent Queues
- Publication number 20100235675
- Publication date Sep 16, 2010
- Sridhar P. Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cache Used Both as Cache and Staging Buffer
- Publication number 20100017568
- Publication date Jan 21, 2010
- Ruchi Wadhawan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Non-blocking Address Switch with Shallow Per Agent Queues
- Publication number 20090055568
- Publication date Feb 26, 2009
- Sridhar P. Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cache Used Both as Cache and Staging Buffer
- Publication number 20080133843
- Publication date Jun 5, 2008
- Ruchi Wadhawan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Partially Populated, Hierarchical Crossbar
- Publication number 20070271402
- Publication date Nov 22, 2007
- Sridhar P. Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Partially populated, hierarchical crossbar
- Publication number 20070038796
- Publication date Feb 15, 2007
- P.A. Semi, Inc.
- Sridhar P. Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Non-blocking address switch with shallow per agent queues
- Publication number 20070038791
- Publication date Feb 15, 2007
- P.A. Semi, Inc.
- Sridhar P. Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Content addressable memory with power reduction technique
- Publication number 20040052133
- Publication date Mar 18, 2004
- George Kong Yiu
- G11 - INFORMATION STORAGE
Information Patent Application
Content addressable memory with power reduction technique
- Publication number 20030061434
- Publication date Mar 27, 2003
- George Kong Yiu
- G11 - INFORMATION STORAGE

George Kong Yiu

Person

Patents Grantslast 30 patents

Cache used both as cache and staging buffer

Non-blocking address switch with shallow per agent queues

Cache used both as cache and staging buffer

Non-blocking address switch with shallow per agent queues

Cache used both as cache and staging buffer

Non-blocking address switch with shallow per agent queues

Segmented interconnect for connecting multiple agents in a system

Segmented interconnect for connecting multiple agents in a system

Content addressable memory with power reduction technique

Content addressable memory with power reduction technique

Patents Applicationslast 30 patents

Cache Used Both as Cache and Staging Buffer

Non-blocking Address Switch with Shallow Per Agent Queues

Cache Used Both as Cache and Staging Buffer

Non-blocking Address Switch with Shallow Per Agent Queues

Cache Used Both as Cache and Staging Buffer

Partially Populated, Hierarchical Crossbar

Partially populated, hierarchical crossbar

Non-blocking address switch with shallow per agent queues

Content addressable memory with power reduction technique

Content addressable memory with power reduction technique