George W. Nation

Person

Eyota, MN, US

People

Patents Grantslast 30 patents

Information Patent Grant
Proxy responder for handling anomalies in a hardware system
- Patent number 8,924,779
- Issue date Dec 30, 2014
- LSI Corporation
- George Wayne Nation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Base platforms with combined ASIC and FPGA features and process of...
- Patent number 8,484,608
- Issue date Jul 9, 2013
- LSI Corporation
- Gary S. Delp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for power dissipation control in a semiconducto...
- Patent number 8,239,700
- Issue date Aug 7, 2012
- LSI Corporation
- George Nation
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Virtual data representation through selective bidirectional transla...
- Patent number 8,156,454
- Issue date Apr 10, 2012
- LSI Corporation
- Robert N. Broberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible template having embedded gate array and composable memory...
- Patent number 7,831,653
- Issue date Nov 9, 2010
- LSI Corporation
- George Wayne Nation
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and structures for improved buffer management and dynamic a...
- Patent number 7,684,326
- Issue date Mar 23, 2010
- LSI Corporation
- George Wayne Nation
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Base platforms with combined ASIC and FPGA features and process of...
- Patent number 7,620,924
- Issue date Nov 17, 2009
- LSI Corporation
- Gary S. Delp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for generalizing design attributes in a design capture envir...
- Patent number 7,496,861
- Issue date Feb 24, 2009
- LSI Corporation
- George W. Nation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Composable system-in-package integrated circuits and process of com...
- Patent number 7,491,579
- Issue date Feb 17, 2009
- LSI Corporation
- Gary S. Delp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual data representation through selective bidirectional transla...
- Patent number 7,434,180
- Issue date Oct 7, 2008
- LSI Corporation
- Robert N. Broberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Suite of tools to design integrated circuits
- Patent number 7,430,725
- Issue date Sep 30, 2008
- LSI Corporation
- Robert Neal Carlton Broberg, III
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flow control enhancement
- Patent number 7,379,422
- Issue date May 27, 2008
- LSI Logic Corporation
- George Wayne Nation
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method for describing and deploying design platform sets
- Patent number 7,331,031
- Issue date Feb 12, 2008
- LSI Logic Corporation
- George W. Nation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and structures for improved buffer management and dynamic a...
- Patent number 7,301,906
- Issue date Nov 27, 2007
- LSI Corporation
- George Wayne Nation
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Automated selection and placement of memory during design of an int...
- Patent number 7,069,523
- Issue date Jun 27, 2006
- LSI Logic Corporation
- George Wayne Nation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Simplified process to design integrated circuits
- Patent number 7,055,113
- Issue date May 30, 2006
- LSI Logic Corporation
- Robert Neal Carlton Broberg, III
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable memory controller
- Patent number 7,043,611
- Issue date May 9, 2006
- LSI Logic Corporation
- Gary P. McClannahan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Architecture and/or method for using input/output affinity region f...
- Patent number 7,043,703
- Issue date May 9, 2006
- LSI Logic Corporation
- George W. Nation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for composing memory on programmable platform devices to mee...
- Patent number 6,966,044
- Issue date Nov 15, 2005
- LSI Logic Corporation
- Paul G. Reuland
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Placement of configurable input/output buffer structures during des...
- Patent number 6,823,502
- Issue date Nov 23, 2004
- LSI Logic Corporation
- Matthew Scott Wingren
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor-memory bus architecture for supporting multiple processors
- Patent number 6,557,069
- Issue date Apr 29, 2003
- International Business Machines Corporation
- Robert Allen Drehmel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for retrofitting multi-threaded operations on...
- Patent number 6,233,599
- Issue date May 15, 2001
- International Business Machines Corporation
- George Wayne Nation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for self-identifying and configuring the nodes of...
- Patent number 6,188,675
- Issue date Feb 13, 2001
- International Business Machines Corporation
- Daniel Francis Casper
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for identifying valid portion of computer resourc...
- Patent number 6,041,324
- Issue date Mar 21, 2000
- International Business Machines Corporation
- Joel Ray Earl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Networked computer system and method of communicating using multipl...
- Patent number 6,006,255
- Issue date Dec 21, 1999
- International Business Machines Corporation
- Russell Dean Hoover
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Indicating when clickable image link on a hypertext image map of a...
- Patent number 5,983,244
- Issue date Nov 9, 1999
- International Business Machines Corporation
- George Wayne Nation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for optimizing reissue commands in master-slave processing s...
- Patent number 5,805,837
- Issue date Sep 8, 1998
- International Business Machines Corporation
- Russell Dean Hoover
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for maintaining n-way associative directories...
- Patent number 5,749,087
- Issue date May 5, 1998
- International Business Machines Corporation
- Russell D. Hoover
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for a buffer reservation system
- Patent number 5,613,073
- Issue date Mar 18, 1997
- International Business Machines Corporation
- William A. Hammond
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Ring configurator for system interconnection using fully covered rings
- Patent number 5,535,213
- Issue date Jul 9, 1996
- International Business Machines Corporation
- Shien-Tai Pan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
Proxy Responder for Handling Anomalies in a Hardware System
- Publication number 20130262918
- Publication date Oct 3, 2013
- LSI Corporation
- George Wayne Nation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR INCREASING DEVICE ACCESS PERFORMANCE IN D...
- Publication number 20130111181
- Publication date May 2, 2013
- LSI Corporation
- Srinivasa Rao Kothamasu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Predictive Power Management Semiconductor Design Tool and Methods f...
- Publication number 20100269074
- Publication date Oct 21, 2010
- LSI CORPORATION
- George Nation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and Methods for Ramped Power State Control in a Semiconduct...
- Publication number 20100268917
- Publication date Oct 21, 2010
- LSI CORPORATION
- George Nation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and Methods for Power Dissipation Control in a Semiconducto...
- Publication number 20100264983
- Publication date Oct 21, 2010
- LSI CORPORATION
- George Nation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Efficient and Secure Main Memory Sharing Across Multiple Processors
- Publication number 20100161879
- Publication date Jun 24, 2010
- LSI CORPORATION
- George Nation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and Methods for Quota Management in a Memory Appliance
- Publication number 20100161909
- Publication date Jun 24, 2010
- LSI CORPORATION
- George Nation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Efficient Memory Allocation Across Multiple Accessing Systems
- Publication number 20100161908
- Publication date Jun 24, 2010
- LSI CORPORATION
- George Nation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Flexible Memory Appliance and Methods for Using Such
- Publication number 20100161929
- Publication date Jun 24, 2010
- LSI CORPORATION
- George Nation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BASE PLATFORMS WITH COMBINED ASIC AND FPGA FEATURES AND PROCESS OF...
- Publication number 20100031222
- Publication date Feb 4, 2010
- LSI Corporation
- Gary S. Delp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Computer main memory incorporating volatile and non-volatile memory
- Publication number 20090313416
- Publication date Dec 17, 2009
- George Wayne Nation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUAL DATA REPRESENTATION THROUGH SELECTIVE BIDIRECTIONAL TRANSLA...
- Publication number 20090007042
- Publication date Jan 1, 2009
- LSI Corporation
- Robert N. Broberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND STRUCTURES FOR IMPROVED BUFFER MANAGEMENT AND DYNAMIC A...
- Publication number 20080037428
- Publication date Feb 14, 2008
- George Wayne Nation
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method for generalizing design attributes in a design capture envir...
- Publication number 20070124716
- Publication date May 31, 2007
- LSI Logic Corporation
- George W. Nation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Composable system-in-package integrated circuits and process of com...
- Publication number 20060236270
- Publication date Oct 19, 2006
- LSI Logic Corporation
- Gary S. Delp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Base platforms with combined ASIC and FPGA features and process of...
- Publication number 20060236292
- Publication date Oct 19, 2006
- LSI Logic Corporation
- Gary S. Delp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for describing and deploying design platform sets
- Publication number 20060200788
- Publication date Sep 7, 2006
- LSI Logic Corporation
- George W. Nation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Virtual data representation through selective bidirectional transla...
- Publication number 20060112376
- Publication date May 25, 2006
- LSI Logic Corporation
- Robert N. Broberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Suite of tools to design integrated circuits
- Publication number 20050240892
- Publication date Oct 27, 2005
- LSI Logic Corporation
- Robert Neal Carlton Broberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Simplified process to design integrated circuits
- Publication number 20040128641
- Publication date Jul 1, 2004
- LSI Logic Corporation
- Robert Neal Carlton Broberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Placement of configurable input/output buffer structures during des...
- Publication number 20040128626
- Publication date Jul 1, 2004
- LSI Logic Corporation
- Matthew Scott Wingren
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Flow control enhancement
- Publication number 20040120334
- Publication date Jun 24, 2004
- LSI Logic Corporation
- George Wayne Nation
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Flexible template having embedded gate array and composable memory...
- Publication number 20040114622
- Publication date Jun 17, 2004
- LSI Logic Corporation
- George Wayne Nation
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Reconfigurable memory controller
- Publication number 20040117566
- Publication date Jun 17, 2004
- Gary P. McClannahan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Automated selection and placement of memory during design of an int...
- Publication number 20040117744
- Publication date Jun 17, 2004
- LSI Logic Corporation
- George Wayne Nation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for composing memory on programmable platform devices to mee...
- Publication number 20040111690
- Publication date Jun 10, 2004
- LSI Logic Corporation
- Paul G. Reuland
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Architecture and/or method for using input/output affinity region f...
- Publication number 20040049604
- Publication date Mar 11, 2004
- LSI Logic Corporation
- George W. Nation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and structures for improved buffer management and dynamic a...
- Publication number 20030117958
- Publication date Jun 26, 2003
- George Wayne Nation
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

George W. Nation

Person

Patents Grantslast 30 patents

Proxy responder for handling anomalies in a hardware system

Base platforms with combined ASIC and FPGA features and process of...

Systems and methods for power dissipation control in a semiconducto...

Virtual data representation through selective bidirectional transla...

Flexible template having embedded gate array and composable memory...

Methods and structures for improved buffer management and dynamic a...

Base platforms with combined ASIC and FPGA features and process of...

Method for generalizing design attributes in a design capture envir...

Composable system-in-package integrated circuits and process of com...

Virtual data representation through selective bidirectional transla...

Suite of tools to design integrated circuits

Flow control enhancement

Method for describing and deploying design platform sets

Methods and structures for improved buffer management and dynamic a...

Automated selection and placement of memory during design of an int...

Simplified process to design integrated circuits

Reconfigurable memory controller

Architecture and/or method for using input/output affinity region f...

Method for composing memory on programmable platform devices to mee...

Placement of configurable input/output buffer structures during des...

Processor-memory bus architecture for supporting multiple processors

Apparatus and method for retrofitting multi-threaded operations on...

System and method for self-identifying and configuring the nodes of...

System and method for identifying valid portion of computer resourc...

Networked computer system and method of communicating using multipl...

Indicating when clickable image link on a hypertext image map of a...

Method for optimizing reissue commands in master-slave processing s...

Method and apparatus for maintaining n-way associative directories...

Apparatus and method for a buffer reservation system

Ring configurator for system interconnection using fully covered rings

Patents Applicationslast 30 patents

Proxy Responder for Handling Anomalies in a Hardware System

METHODS AND APPARATUS FOR INCREASING DEVICE ACCESS PERFORMANCE IN D...

Predictive Power Management Semiconductor Design Tool and Methods f...

Systems and Methods for Ramped Power State Control in a Semiconduct...

Systems and Methods for Power Dissipation Control in a Semiconducto...

Efficient and Secure Main Memory Sharing Across Multiple Processors

Systems and Methods for Quota Management in a Memory Appliance

Efficient Memory Allocation Across Multiple Accessing Systems

Flexible Memory Appliance and Methods for Using Such

BASE PLATFORMS WITH COMBINED ASIC AND FPGA FEATURES AND PROCESS OF...

Computer main memory incorporating volatile and non-volatile memory

VIRTUAL DATA REPRESENTATION THROUGH SELECTIVE BIDIRECTIONAL TRANSLA...

METHODS AND STRUCTURES FOR IMPROVED BUFFER MANAGEMENT AND DYNAMIC A...

Method for generalizing design attributes in a design capture envir...

Composable system-in-package integrated circuits and process of com...

Base platforms with combined ASIC and FPGA features and process of...

Method for describing and deploying design platform sets

Virtual data representation through selective bidirectional transla...

Suite of tools to design integrated circuits

Simplified process to design integrated circuits

Placement of configurable input/output buffer structures during des...

Flow control enhancement

Flexible template having embedded gate array and composable memory...

Reconfigurable memory controller

Automated selection and placement of memory during design of an int...

Method for composing memory on programmable platform devices to mee...

Architecture and/or method for using input/output affinity region f...

Methods and structures for improved buffer management and dynamic a...