Georgios Faldamis

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Somerville, MA, US

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Patents Grantslast 30 patents

Information Patent Grant
Glitch-free PLL Multiplexer
- Patent number 10,530,370
- Issue date Jan 7, 2020
- Marvell International Ltd.
- Nitin Mohan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Frequency division clock alignment
- Patent number 9,417,655
- Issue date Aug 16, 2016
- Cavium, Inc.
- Suresh Balasubramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Frequency division clock alignment using pattern selection
- Patent number 9,411,361
- Issue date Aug 9, 2016
- Cavium, Inc.
- Suresh Balasubramanian
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
FREQUENCY DIVISION CLOCK ALIGNMENT USING PATTERN SELECTION
- Publication number 20160142067
- Publication date May 19, 2016
- Cavium, Inc.
- Suresh Balasubramanian
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FREQUENCY DIVISION CLOCK ALIGNMENT
- Publication number 20160142066
- Publication date May 19, 2016
- Cavium, Inc.
- Suresh Balasubramanian
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MULTI-CORE NETWORK PROCESSOR INTERCONNECT WITH MULTI-NODE CONNECTION
- Publication number 20150254182
- Publication date Sep 10, 2015
- Cavium, Inc.
- David H. Asher
- G06 - COMPUTING CALCULATING COUNTING