Gerald E. Sobelman

Person

Minnetonka, MN, US

People

Patents Grantslast 30 patents

Information Patent Grant
Null convention threshold gate
- Patent number 6,900,658
- Issue date May 31, 2005
- Theseus Logic Inc.
- Gerald E. Sobelman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable gate array
- Patent number 6,313,660
- Issue date Nov 6, 2001
- Theseus Logic, Inc.
- Gerald Edward Sobelman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semi-dynamic and dynamic threshold gates with modified pull-up stru...
- Patent number 6,262,593
- Issue date Jul 17, 2001
- Theseus Logic, Inc.
- Gerald Edward Sobelman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Null convention logic gates with flash, set and reset capability
- Patent number 6,043,674
- Issue date Mar 28, 2000
- Theseus Logic, Inc.
- Gerald Edward Sobelman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Look up table threshold gates
- Patent number 6,020,754
- Issue date Feb 1, 2000
- Theseus Logic, Inc.
- Gerald Edward Sobelman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable gate array
- Patent number 5,986,466
- Issue date Nov 16, 1999
- Theseus Logic, Inc.
- Gerald Edward Sobelman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Null convention adder
- Patent number 5,793,662
- Issue date Aug 11, 1998
- Theseus Research, Inc.
- David A. Duncan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Null convention threshold gate
- Patent number 5,664,211
- Issue date Sep 2, 1997
- Theseus Research, Inc.
- Gerald Sobelman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Null convention threshold gate
- Patent number 5,656,948
- Issue date Aug 12, 1997
- Theseus Research, Inc.
- Gerald E. Sobelman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Current mode null convention threshold gate
- Patent number 5,640,105
- Issue date Jun 17, 1997
- Theseus Research, Inc.
- Gerald E. Sobelman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital signal processor with delayed-evaluation array multipliers...
- Patent number 5,333,119
- Issue date Jul 26, 1994
- Regents of The University of Minnesota
- Donovan L. Raatz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Gerald E. Sobelman

Person

Patents Grantslast 30 patents

Null convention threshold gate

Programmable gate array

Semi-dynamic and dynamic threshold gates with modified pull-up stru...

Null convention logic gates with flash, set and reset capability

Look up table threshold gates

Programmable gate array

Null convention adder

Null convention threshold gate

Null convention threshold gate

Current mode null convention threshold gate

Digital signal processor with delayed-evaluation array multipliers...