Gerald R. Talbot

Person

Concord, MA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Periodic receiver clock data recovery with dynamic data edge
- Patent number 12,174,769
- Issue date Dec 24, 2024
- Advanced Micro Devices, Inc.
- Gurunath Dollin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combination scheme for baseline wander, direct current level shifti...
- Patent number 12,034,440
- Issue date Jul 9, 2024
- Advanced Micro Devices, Inc.
- Rajesh Kumar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Skew matching in a die-to-die interface
- Patent number 11,960,435
- Issue date Apr 16, 2024
- Advanced Micro Devices, Inc.
- Pradeep Jayaraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Channel training using a replica lane
- Patent number 11,805,026
- Issue date Oct 31, 2023
- Advanced Micro Devices, Inc.
- Stanley Ames Lackey
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Alternative protocol over physical layer
- Patent number 11,693,813
- Issue date Jul 4, 2023
- ATI Technologies ULC
- Gordon Caruk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Deskewing method for a physical layer interface on a multi-chip module
- Patent number 11,283,589
- Issue date Mar 22, 2022
- Advanced Micro Devices, Inc.
- Varun Gupta
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Data communications with enhanced speed mode
- Patent number 11,151,075
- Issue date Oct 19, 2021
- ATI Technologies ULC
- Gordon Caruk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Deskewing method for a physical layer interface on a multi-chip module
- Patent number 10,873,445
- Issue date Dec 22, 2020
- Advanced Micro Devices, Inc.
- Varun Gupta
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Channel training using a replica lane
- Patent number 10,749,756
- Issue date Aug 18, 2020
- Advanced Micro Devices, Inc.
- Stanley Ames Lackey
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Pseudo differential receiving mechanism for single-ended signaling
- Patent number 10,749,552
- Issue date Aug 18, 2020
- Advanced Micro Devices, Inc.
- Balwinder Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Alternative protocol selection
- Patent number 10,698,856
- Issue date Jun 30, 2020
- ATI Technologies ULC
- Gordon Caruk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power VTT generation mechanism for receiver termination
- Patent number 10,692,545
- Issue date Jun 23, 2020
- Advanced Micro Devices, Inc.
- Milam Paraschou
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Land pad design for high speed terminals
- Patent number 10,636,736
- Issue date Apr 28, 2020
- Advanced Micro Devices, Inc.
- Sanjay Dandia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Deskewing method for a physical layer interface on a multi-chip module
- Patent number 10,581,587
- Issue date Mar 3, 2020
- Advanced Micro Devices, Inc.
- Varun Gupta
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Active equalizing negative resistance amplifier for bi-directional...
- Patent number 10,122,392
- Issue date Nov 6, 2018
- Advanced Micro Devices, Inc.
- Milam Paraschou
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Asynchronous feedback training
- Patent number 10,103,837
- Issue date Oct 16, 2018
- Advanced Micro Devices, Inc.
- Stanley Ames Lackey
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for power-up detection for an electrical monit...
- Patent number 9,374,080
- Issue date Jun 21, 2016
- Advanced Micro Devices, Inc.
- Brian W. Amick
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Selective insertion of clock mismatch compensation symbols in signa...
- Patent number 9,213,355
- Issue date Dec 15, 2015
- Advanced Micro Devices, Inc.
- Gordon F. Caruk
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
DDR 2D Vref training
- Patent number 9,214,199
- Issue date Dec 15, 2015
- Advanced Micro Devices, Inc.
- Kevin M. Brandl
- G11 - INFORMATION STORAGE
Information Patent Grant
DDR receiver enable cycle training
- Patent number 9,183,125
- Issue date Nov 10, 2015
- Advanced Micro Devices, Inc.
- Kevin M. Brandl
- G11 - INFORMATION STORAGE
Information Patent Grant
DDR 2D Vref training
- Patent number 8,850,155
- Issue date Sep 30, 2014
- Advanced Micro Devices, Inc.
- Kevin M. Brandl
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for memory access delay training
- Patent number 8,760,946
- Issue date Jun 24, 2014
- Advanced Micro Devices
- Glenn A Dearth
- G11 - INFORMATION STORAGE
Information Patent Grant
Transmitter voltage and receiver time margining
- Patent number 8,570,881
- Issue date Oct 29, 2013
- Advanced Micro Devices, Inc.
- Gerald R. Talbot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for using DFE in a system with non-continuous...
- Patent number 8,553,754
- Issue date Oct 8, 2013
- Advanced Micro Devices, Inc.
- Ramon Mangaser
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Programmable delay module testing device and methods thereof
- Patent number 8,274,272
- Issue date Sep 25, 2012
- Advanced Micro Devices, Inc.
- Gerald R. Talbot
- G01 - MEASURING TESTING
Information Patent Grant
Memory controller including a dual-mode memory interconnect
- Patent number 8,019,907
- Issue date Sep 13, 2011
- GLOBALFOUNDRIES Inc.
- Gerald R. Talbot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to reduce the effect of crosstalk in a communi...
- Patent number 8,000,404
- Issue date Aug 16, 2011
- Advanced Micro Devices, Inc.
- Gerald R. Talbot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
In-band method to configure equalization levels
- Patent number 7,986,727
- Issue date Jul 26, 2011
- GLOBALFOUNDRIES Inc.
- Gerald R. Talbot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for scrambling data for control of high-speed...
- Patent number 7,929,549
- Issue date Apr 19, 2011
- Advanced Micro Devices, Inc.
- Gerald R. Talbot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Memory system including asymmetric high-speed differential memory i...
- Patent number 7,861,140
- Issue date Dec 28, 2010
- GLOBALFOUNDRIES Inc.
- Gerald R. Talbot
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
COMBINATION SCHEME FOR BASELINE WANDER, DIRECT CURRENT LEVEL SHIFTI...
- Publication number 20250007516
- Publication date Jan 2, 2025
- ADVANCED MICRO DEVICES, INC.
- Rajesh Kumar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
THREE-STAGE DIFFERENTIAL RING OSCILLATOR GENERATING DIFFERENTIAL IN...
- Publication number 20230396240
- Publication date Dec 7, 2023
- ADVANCED MICRO DEVICES, INC.
- Thomas H. Likens
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALTERNATIVE PROTOCOL OVER PHYSICAL LAYER
- Publication number 20230342325
- Publication date Oct 26, 2023
- ATI TECHNOLOGIES ULC
- Gordon Caruk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERIODIC RECEIVER CLOCK DATA RECOVERY WITH DYNAMIC DATA EDGE
- Publication number 20230305979
- Publication date Sep 28, 2023
- ADVANCED MICRO DEVICES, INC.
- Gurunath Dollin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RECEIVER EQUALIZATION CIRCUITRY USING VARIABLE TERMINATION AND T-COIL
- Publication number 20230308132
- Publication date Sep 28, 2023
- ADVANCED MICRO DEVICES, INC.
- Dean E. Gonzales
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SKEW MATCHING IN A DIE-TO-DIE INTERFACE
- Publication number 20230195678
- Publication date Jun 22, 2023
- ADVANCED MICRO DEVICES, INC.
- PRADEEP JAYARAMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMBINATION SCHEME FOR BASELINE WANDER, DIRECT CURRENT LEVEL SHIFTI...
- Publication number 20230134926
- Publication date May 4, 2023
- ADVANCED MICRO DEVICES, INC.
- Rajesh Kumar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DATA COMMUNICATIONS WITH ENHANCED SPEED MODE
- Publication number 20220035765
- Publication date Feb 3, 2022
- ATI TECHNOLOGIES ULC
- Gordon Caruk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DESKEWING METHOD FOR A PHYSICAL LAYER INTERFACE ON A MULTI-CHIP MODULE
- Publication number 20210111861
- Publication date Apr 15, 2021
- ADVANCED MICRO DEVICES, INC.
- Varun Gupta
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CHANNEL TRAINING USING A REPLICA LANE
- Publication number 20210028995
- Publication date Jan 28, 2021
- ADVANCED MICRO DEVICES, INC.
- Stanley Ames Lackey
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DESKEWING METHOD FOR A PHYSICAL LAYER INTERFACE ON A MULTI-CHIP MODULE
- Publication number 20200344039
- Publication date Oct 29, 2020
- ADVANCED MICRO DEVICES, INC.
- Varun Gupta
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DATA COMMUNICATIONS WITH ENHANCED SPEED MODE
- Publication number 20200192852
- Publication date Jun 18, 2020
- ATI Technologies ULC
- Gordon Caruk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALTERNATIVE PROTOCOL OVER PHYSICAL LAYER
- Publication number 20200192853
- Publication date Jun 18, 2020
- ATI Technologies ULC
- Gordon Caruk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALTERNATIVE PROTOCOL SELECTION
- Publication number 20200192850
- Publication date Jun 18, 2020
- ATI Technologies ULC
- Gordon Caruk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW POWER VTT GENERATION MECHANISM FOR RECEIVER TERMINATION
- Publication number 20200098399
- Publication date Mar 26, 2020
- ADVANCED MICRO DEVICES, INC.
- Milam Paraschou
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PSEUDO DIFFERENTIAL RECEIVING MECHANISM FOR SINGLE-ENDED SIGNALING
- Publication number 20200099406
- Publication date Mar 26, 2020
- ADVANCED MICRO DEVICES, INC.
- Balwinder Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PASSIVE CONTINUOUS-TIME LINEAR EQUALIZER
- Publication number 20200036563
- Publication date Jan 30, 2020
- ADVANCED MICRO DEVICES, INC.
- Gerald R. TALBOT
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
Land Pad Design for High Speed Terminals
- Publication number 20190181087
- Publication date Jun 13, 2019
- ADVANCED MICRO DEVICES, INC.
- Sanjay Dandia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERPOSER TRANSMISSION LINE USING MULTIPLE METAL LAYERS
- Publication number 20180130780
- Publication date May 10, 2018
- Advanced Micro Devices
- DEAN GONZALES
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ACTIVE EQUALIZING NEGATIVE RESISTANCE AMPLIFIER FOR BI-DIRECTIONAL...
- Publication number 20180054223
- Publication date Feb 22, 2018
- Advanced Micro Devices, Inc.
- Milam Paraschou
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CHANNEL TRAINING USING A REPLICA LANE
- Publication number 20170373944
- Publication date Dec 28, 2017
- Advanced Micro Devices, Inc.
- Stanley Ames Lackey
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ASYNCHRONOUS FEEDBACK TRAINING
- Publication number 20170373788
- Publication date Dec 28, 2017
- Advanced Micro Devices, Inc.
- Stanley Ames Lackey
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR POWER-UP DETECTION FOR AN ELECTRICAL MONIT...
- Publication number 20150130519
- Publication date May 14, 2015
- Advanced Micro Devices, Inc.
- Brian W. Amick
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DDR 2D VREF TRAINING
- Publication number 20150078104
- Publication date Mar 19, 2015
- Advanced Micro Devices, Inc.
- Kevin M. Brandl
- G11 - INFORMATION STORAGE
Information Patent Application
SELECTIVE INSERTION OF CLOCK MISMATCH COMPENSATION SYMBOLS IN SIGNA...
- Publication number 20140129867
- Publication date May 8, 2014
- Advanced Micro Devices, Inc.
- Gordon F. Caruk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Memory Access Delay Training
- Publication number 20130315014
- Publication date Nov 28, 2013
- Glenn A Dearth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DDR RECEIVER ENABLE CYCLE TRAINING
- Publication number 20130159615
- Publication date Jun 20, 2013
- Advanced Micro Devices, Inc.
- Kevin M. Brandl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DDR 2D VREF TRAINING
- Publication number 20130155788
- Publication date Jun 20, 2013
- Advanced Micro Devices, Inc.
- Kevin M. Brandl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR USING DFE IN A SYSTEM WITH NON-CONTINUOUS...
- Publication number 20120155529
- Publication date Jun 21, 2012
- Advanced Micro Devices, Inc.
- Ramon Mangaser
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MEMORY CONTROLLER INCLUDING A DUAL-MODE MEMORY INTERCONNECT
- Publication number 20100228891
- Publication date Sep 9, 2010
- Gerald R. Talbot
- G06 - COMPUTING CALCULATING COUNTING

Gerald R. Talbot

Person

Patents Grantslast 30 patents

Periodic receiver clock data recovery with dynamic data edge

Combination scheme for baseline wander, direct current level shifti...

Skew matching in a die-to-die interface

Channel training using a replica lane

Alternative protocol over physical layer

Deskewing method for a physical layer interface on a multi-chip module

Data communications with enhanced speed mode

Deskewing method for a physical layer interface on a multi-chip module

Channel training using a replica lane

Pseudo differential receiving mechanism for single-ended signaling

Alternative protocol selection

Low power VTT generation mechanism for receiver termination

Land pad design for high speed terminals

Deskewing method for a physical layer interface on a multi-chip module

Active equalizing negative resistance amplifier for bi-directional...

Asynchronous feedback training

Method and apparatus for power-up detection for an electrical monit...

Selective insertion of clock mismatch compensation symbols in signa...

DDR 2D Vref training

DDR receiver enable cycle training

DDR 2D Vref training

Method and apparatus for memory access delay training

Transmitter voltage and receiver time margining

Method and apparatus for using DFE in a system with non-continuous...

Programmable delay module testing device and methods thereof

Memory controller including a dual-mode memory interconnect

Method and apparatus to reduce the effect of crosstalk in a communi...

In-band method to configure equalization levels

Method and apparatus for scrambling data for control of high-speed...

Memory system including asymmetric high-speed differential memory i...

Patents Applicationslast 30 patents

COMBINATION SCHEME FOR BASELINE WANDER, DIRECT CURRENT LEVEL SHIFTI...

THREE-STAGE DIFFERENTIAL RING OSCILLATOR GENERATING DIFFERENTIAL IN...

ALTERNATIVE PROTOCOL OVER PHYSICAL LAYER

PERIODIC RECEIVER CLOCK DATA RECOVERY WITH DYNAMIC DATA EDGE

RECEIVER EQUALIZATION CIRCUITRY USING VARIABLE TERMINATION AND T-COIL

SKEW MATCHING IN A DIE-TO-DIE INTERFACE

COMBINATION SCHEME FOR BASELINE WANDER, DIRECT CURRENT LEVEL SHIFTI...

DATA COMMUNICATIONS WITH ENHANCED SPEED MODE

DESKEWING METHOD FOR A PHYSICAL LAYER INTERFACE ON A MULTI-CHIP MODULE

CHANNEL TRAINING USING A REPLICA LANE

DESKEWING METHOD FOR A PHYSICAL LAYER INTERFACE ON A MULTI-CHIP MODULE

DATA COMMUNICATIONS WITH ENHANCED SPEED MODE

ALTERNATIVE PROTOCOL OVER PHYSICAL LAYER

ALTERNATIVE PROTOCOL SELECTION

LOW POWER VTT GENERATION MECHANISM FOR RECEIVER TERMINATION

PSEUDO DIFFERENTIAL RECEIVING MECHANISM FOR SINGLE-ENDED SIGNALING

PASSIVE CONTINUOUS-TIME LINEAR EQUALIZER

Land Pad Design for High Speed Terminals

INTERPOSER TRANSMISSION LINE USING MULTIPLE METAL LAYERS

ACTIVE EQUALIZING NEGATIVE RESISTANCE AMPLIFIER FOR BI-DIRECTIONAL...

CHANNEL TRAINING USING A REPLICA LANE

ASYNCHRONOUS FEEDBACK TRAINING

METHOD AND APPARATUS FOR POWER-UP DETECTION FOR AN ELECTRICAL MONIT...

DDR 2D VREF TRAINING

SELECTIVE INSERTION OF CLOCK MISMATCH COMPENSATION SYMBOLS IN SIGNA...

Method and Apparatus for Memory Access Delay Training

DDR RECEIVER ENABLE CYCLE TRAINING

DDR 2D VREF TRAINING

METHOD AND APPARATUS FOR USING DFE IN A SYSTEM WITH NON-CONTINUOUS...

MEMORY CONTROLLER INCLUDING A DUAL-MODE MEMORY INTERCONNECT