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Gerard Boudon
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Patents Grants
last 30 patents
Information
Patent Grant
Self-synchronizing bit error analyzer and circuit
Patent number
7,661,039
Issue date
Feb 9, 2010
International Business Machines Corporation
Gerard Boudon
G01 - MEASURING TESTING
Information
Patent Grant
Self-synchronising bit error analyser and circuit
Patent number
7,404,115
Issue date
Jul 22, 2008
International Business Machines Corporation
Gerard Boudon
G01 - MEASURING TESTING
Information
Patent Grant
Interrupt masker for an interrupt handler with double-edge interrup...
Patent number
6,219,744
Issue date
Apr 17, 2001
International Business Machines Corporation
Francis Bredin
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Multi-emitter BICMOS logic circuit family with superior performance
Patent number
5,166,552
Issue date
Nov 24, 1992
International Business Machines Corporation
Anthony G. Aipperspach
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Differential cascode current switch (DCCS) logic circuit family wit...
Patent number
5,075,574
Issue date
Dec 24, 1991
International Business Machines Corporation
Gerard Boudon
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Complementary emitter follower drivers
Patent number
5,023,478
Issue date
Jun 11, 1991
International Business Machines Corporation
Gerard Boudon
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
BICMOS logic circuit with full swing operation
Patent number
5,010,257
Issue date
Apr 23, 1991
International Business Machines Corporation
Gerard Boudon
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Latch cell family in CMOS technology gate array
Patent number
4,988,893
Issue date
Jan 29, 1991
International Business Machines Corporation
Martine Bonneau
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Logic circuits for forming VLSI logic networks
Patent number
4,950,927
Issue date
Aug 21, 1990
International Business Machines Corporation
Gerard Boudon
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Duplicated circuit arrangement for fast transmission and repairability
Patent number
4,856,000
Issue date
Aug 8, 1989
International Business Machines Corporation
Michel Bauge
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Chip to chip information bit transmission process and device
Patent number
4,539,680
Issue date
Sep 3, 1985
International Business Machines Corp.
Gerard Boudon
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Decoding and selection circuit for a monolithic memory
Patent number
4,394,752
Issue date
Jul 19, 1983
International Business Machines Corporation
Gerard Boudon
G11 - INFORMATION STORAGE
Patents Applications
last 30 patents
Information
Patent Application
Self-synchronizing bit error analyzer and circuit
Publication number
20090019326
Publication date
Jan 15, 2009
Gerard Boudon
G01 - MEASURING TESTING
Information
Patent Application
SELF-SYNCHRONISING BIT ERROR ANALYSER AND CIRCUIT
Publication number
20070011534
Publication date
Jan 11, 2007
International Business Machines Corporation
Gerard Boudon
G01 - MEASURING TESTING
Information
Patent Application
AN IMPROVED FIFO BASED CONTROLLER CIRCUIT FOR SLAVE DEVICES ATTACHE...
Publication number
20040123004
Publication date
Jun 24, 2004
International Business Machines Corporation
Gerard Boudon
G06 - COMPUTING CALCULATING COUNTING