Gerd Rombach

Person

Freising, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Continuous coarse-tuned phase locked loop
- Patent number 10,056,911
- Issue date Aug 21, 2018
- Texas Instruments Incorporated
- Gerd Rombach
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High speed, rail-to-rail CMOS differential input stage
- Patent number 9,356,570
- Issue date May 31, 2016
- Texas Instruments Deutschland GmbH
- Gerd Rombach
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Data pipeline with large tuning range of clock signals
- Patent number 8,166,286
- Issue date Apr 24, 2012
- Texas Instruments Deutschland GmbH
- Ingolf Frank
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Register with process, supply voltage and temperature variation ind...
- Patent number 8,111,092
- Issue date Feb 7, 2012
- Texas Instruments Incorporated
- Gerd Rombach
- G11 - INFORMATION STORAGE
Information Patent Grant
Phase-locked loop (PLL) circuit and method
- Patent number 7,868,670
- Issue date Jan 11, 2011
- Texas Instruments Deutschland GmbH
- Georg Becke
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital data buffer with phase aligner
- Patent number 7,800,975
- Issue date Sep 21, 2010
- Texas Instruments Deutschland GmbH
- Gerd Rombach
- G11 - INFORMATION STORAGE
Information Patent Grant
Phase-locked loop circuit
- Patent number 7,663,417
- Issue date Feb 16, 2010
- Texas Instruments Deutschland GmbH
- Gerd Rombach
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
PLL circuit having reduced capacitor size
- Patent number 7,154,345
- Issue date Dec 26, 2006
- Texas Instruments Incorporated
- Miki Moyal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock generator circuit with a PLL having an output frequency cycle...
- Patent number 6,590,458
- Issue date Jul 8, 2003
- Texas Instruments Incorporated
- Gerd Rombach
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fast bus driver with reduced standby power consumption
- Patent number 6,154,089
- Issue date Nov 28, 2000
- Texas Instruments Incorporated
- Gerd Rombach
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Control circuit for bicmos bus drivers
- Patent number 5,852,383
- Issue date Dec 22, 1998
- Texas Instruments Incorporated
- Gerd Rombach
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
CONTINUOUS COARSE-TUNED PHASE LOCKED LOOP
- Publication number 20170179964
- Publication date Jun 22, 2017
- Texas Instruments Deutschland GmbH
- Gerd ROMBACH
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HIGH SPEED, RAIL-TO-RAIL CMOS DIFFERENTIAL INPUT STAGE
- Publication number 20150333705
- Publication date Nov 19, 2015
- Texas Instruments Deutschland GmbH
- Gerd Rombach
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DATA PIPELINE WITH LARGE TUNING RANGE OF CLOCK SIGNALS
- Publication number 20080313485
- Publication date Dec 18, 2008
- Texas Instruments Deutschland GmbH
- Ingolf Frank
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REGISTER WITH PROCESS, SUPPLY VOLTAGE AND TEMPERATURE VARIATION IND...
- Publication number 20080301485
- Publication date Dec 4, 2008
- Texas Instruments Deutschland GmbH
- Gerd Rombach
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIGITAL DATA BUFFER
- Publication number 20080215805
- Publication date Sep 4, 2008
- Texas Instruments Deutschland GmbH
- Gerd Rombach
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COMPLEMENTARY OUTPUT FLIP FLOP
- Publication number 20080192551
- Publication date Aug 14, 2008
- Texas Instruments Deutschland GmbH
- Gerd Rombach
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PHASE-LOCKED LOOP CIRCUIT
- Publication number 20080169850
- Publication date Jul 17, 2008
- Texas Instruments Deutschland GmbH
- Gerd Rombach
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PHASE-LOCKED LOOP (PLL) CIRCUIT AND METHOD
- Publication number 20080054960
- Publication date Mar 6, 2008
- Texas Instruments Deutschland GmbH
- Georg Becke
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INTEGRATED CMOS CIRCUIT WITH DIFFERENTIAL OPEN DRAIN OUTPUT DRIVER
- Publication number 20080042694
- Publication date Feb 21, 2008
- Texas Instruments Deutschland GmbH
- Gerd Rombach
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Oscillator
- Publication number 20070052483
- Publication date Mar 8, 2007
- Markus Dietl
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Digital spread spectrum clock signal generation
- Publication number 20060159157
- Publication date Jul 20, 2006
- Hermann Seibold
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Compact PLL circuit
- Publication number 20050122174
- Publication date Jun 9, 2005
- Miki Moyal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
A CLOCK GENERATOR CIRCUIT WITH A PLL HAVING AN OUTPUT FREQUENCY CYC...
- Publication number 20030062956
- Publication date Apr 3, 2003
- Gerd Rombach
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CMOS bus driver circuit
- Publication number 20020024101
- Publication date Feb 28, 2002
- Gerd Rombach
- H03 - BASIC ELECTRONIC CIRCUITRY

Gerd Rombach

Person

Patents Grantslast 30 patents

Continuous coarse-tuned phase locked loop

High speed, rail-to-rail CMOS differential input stage

Data pipeline with large tuning range of clock signals

Register with process, supply voltage and temperature variation ind...

Phase-locked loop (PLL) circuit and method

Digital data buffer with phase aligner

Phase-locked loop circuit

PLL circuit having reduced capacitor size

Clock generator circuit with a PLL having an output frequency cycle...

Fast bus driver with reduced standby power consumption

Control circuit for bicmos bus drivers

Patents Applicationslast 30 patents

CONTINUOUS COARSE-TUNED PHASE LOCKED LOOP

HIGH SPEED, RAIL-TO-RAIL CMOS DIFFERENTIAL INPUT STAGE

DATA PIPELINE WITH LARGE TUNING RANGE OF CLOCK SIGNALS

REGISTER WITH PROCESS, SUPPLY VOLTAGE AND TEMPERATURE VARIATION IND...

DIGITAL DATA BUFFER

COMPLEMENTARY OUTPUT FLIP FLOP

PHASE-LOCKED LOOP CIRCUIT

PHASE-LOCKED LOOP (PLL) CIRCUIT AND METHOD

INTEGRATED CMOS CIRCUIT WITH DIFFERENTIAL OPEN DRAIN OUTPUT DRIVER

Oscillator

Digital spread spectrum clock signal generation

Compact PLL circuit

A CLOCK GENERATOR CIRCUIT WITH A PLL HAVING AN OUTPUT FREQUENCY CYC...

CMOS bus driver circuit