Gill Yong Lee

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Selection gate separation for 3D NAND
- Patent number 12,148,475
- Issue date Nov 19, 2024
- Applied Materials, Inc.
- Chang Seok Kang
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional dynamic random access memory (DRAM) and methods o...
- Patent number 11,818,877
- Issue date Nov 14, 2023
- Applied Materials, Inc.
- Chang Seok Kang
Information Patent Grant
3-D DRAM structure with vertical bit-line
- Patent number 11,763,856
- Issue date Sep 19, 2023
- Applied Materials, Inc.
- Sung-Kwan Kang
- G11 - INFORMATION STORAGE
Information Patent Grant
Method to scale dram with self aligned bit line process
- Patent number 11,765,889
- Issue date Sep 19, 2023
- Applied Materials, Inc.
- Sung-Kwan Kang
Information Patent Grant
3D DRAM structure with high mobility channel
- Patent number 11,749,315
- Issue date Sep 5, 2023
- Applied Materials, Inc.
- Chang Seok Kang
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of testing a gap fill for DRAM
- Patent number 11,621,266
- Issue date Apr 4, 2023
- Applied Materials, Inc.
- Priyadarshi Panda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reducing gate induced drain leakage in DRAM wordline
- Patent number 11,552,082
- Issue date Jan 10, 2023
- Applied Materials, Inc.
- Sung-Kwan Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and apparatus for three dimensional NAND structure fabrication
- Patent number 11,545,504
- Issue date Jan 3, 2023
- Applied Materials, Inc.
- Takehito Koshizawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and apparatus for three dimensional NAND structure fabrication
- Patent number 11,430,801
- Issue date Aug 30, 2022
- Applied Materials, Inc.
- Takehito Koshizawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D dram structure with high mobility channel
- Patent number 11,295,786
- Issue date Apr 5, 2022
- Applied Materials, Inc.
- Chang Seok Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gap fill methods of forming buried word lines in DRAM without formi...
- Patent number 11,171,141
- Issue date Nov 9, 2021
- Applied Materials, Inc.
- Priyadarshi Panda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal contact landing structure
- Patent number 11,049,695
- Issue date Jun 29, 2021
- Micromaterials LLC
- Sung Kwan Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and apparatus for three dimensional NAND structure fabrication
- Patent number 10,998,329
- Issue date May 4, 2021
- Applied Materials, Inc.
- Takehito Koshizawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and apparatus for three-dimensional NAND structure fabrication
- Patent number 10,964,717
- Issue date Mar 30, 2021
- Applied Materials, Inc.
- Sung-Kwan Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reducing gate induced drain leakage in DRAM wordline
- Patent number 10,790,287
- Issue date Sep 29, 2020
- Applied Materials, Inc.
- Sung-Kwan Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cap layer for bit line resistance reduction
- Patent number 10,700,072
- Issue date Jun 30, 2020
- Applied Materials, Inc.
- Priyadarshi Panda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for substrate fabrication
- Patent number 10,529,602
- Issue date Jan 7, 2020
- Applied Materials, Inc.
- Priyadarshi Panda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D NAND staircase CD fabrication utilizing ruthenium material
- Patent number 9,653,311
- Issue date May 16, 2017
- Applied Materials, Inc.
- Seul Ki Ahn
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
DIRECT WORD LINE CONTACT AND METHODS OF MANUFACTURE FOR 3D MEMORY
- Publication number 20230371246
- Publication date Nov 16, 2023
- Applied Materials, Inc.
- Chang Seok Kang
Information Patent Application
STRUCTURE AND FABRICATION METHOD OF HIGH VOLTAGE MOSFET WITH A VERT...
- Publication number 20230317845
- Publication date Oct 5, 2023
- Applied Materials, Inc.
- Changseok KANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NAND CELL STRUCTURE WITH CHARGE TRAP CUT
- Publication number 20230164993
- Publication date May 25, 2023
- Applied Materials, Inc.
- Chang Seok Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
L-TYPE WORDLINE CONNECTION STRUCTURE FOR THREE-DIMENSIONAL MEMORY
- Publication number 20230146831
- Publication date May 11, 2023
- Applied Materials, Inc.
- Chang Seok Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE DIMENSIONAL MEMORY DEVICE AND METHOD OF FABRICATION
- Publication number 20230101155
- Publication date Mar 30, 2023
- Applied Materials, Inc.
- Chang Seok Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL DYNAMIC RANDOM ACCESS MEMORY (DRAM) AND METHODS O...
- Publication number 20230096309
- Publication date Mar 30, 2023
- Applied Materials, Inc.
- Chang Seok KANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELECTION GATE STRUCTURE AND FABRICATION METHOD FOR 3D MEMORY
- Publication number 20230040627
- Publication date Feb 9, 2023
- Applied Materials, Inc.
- Chang Seok Kang
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCED STRAIN Si/SiGe HETEROEPITAXY STACKS FOR 3D DRAM
- Publication number 20230012819
- Publication date Jan 19, 2023
- Applied Materials, Inc.
- John Byron Tolle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods Of Forming Memory Device With Reduced Resistivity
- Publication number 20220415651
- Publication date Dec 29, 2022
- Applied Materials, Inc.
- Qixin Shen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POLY-SILICON BASED WORD LINE FOR 3D MEMORY
- Publication number 20220367560
- Publication date Nov 17, 2022
- Applied Materials, Inc.
- Chang Seok Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD TO SCALE DRAM WITH SELF ALIGNED BIT LINE PROCESS
- Publication number 20220352176
- Publication date Nov 3, 2022
- Applied Materials, Inc.
- Sung-Kwan Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELECTION GATE SEPARATION FOR 3D NAND
- Publication number 20220319601
- Publication date Oct 6, 2022
- Applied Materials, Inc.
- Chang Seok Kang
- G11 - INFORMATION STORAGE
Information Patent Application
3D DRAM STRUCTURE WITH HIGH MOBILITY CHANNEL
- Publication number 20220108728
- Publication date Apr 7, 2022
- Applied Materials, Inc.
- Chang Seok Kang
- G11 - INFORMATION STORAGE
Information Patent Application
GAP FILL METHODS FOR DRAM
- Publication number 20220068935
- Publication date Mar 3, 2022
- Applied Materials, Inc.
- Priyadarshi Panda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3-D DRAM Structure With Vertical Bit-Line
- Publication number 20210272604
- Publication date Sep 2, 2021
- Applied Materials, Inc.
- Sung-Kwan Kang
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND APPARATUS FOR THREE DIMENSIONAL NAND STRUCTURE FABRICATION
- Publication number 20210257375
- Publication date Aug 19, 2021
- Applied Materials, Inc.
- Takehito Koshizawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND APPARATUS FOR THREE DIMENSIONAL NAND STRUCTURE FABRICATION
- Publication number 20210233918
- Publication date Jul 29, 2021
- Applied Materials, Inc.
- Takehito Koshizawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REDUCING GATE INDUCED DRAIN LEAKAGE IN DRAM WORDLINE
- Publication number 20200388621
- Publication date Dec 10, 2020
- Applied Materials, Inc.
- Sung-Kwan Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND APPARATUS FOR THREE DIMENSIONAL NAND STRUCTURE FABRICATION
- Publication number 20200373310
- Publication date Nov 26, 2020
- Applied Materials, Inc.
- Takehito Koshizawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GAP FILL METHODS FOR DRAM
- Publication number 20200286897
- Publication date Sep 10, 2020
- Applied Materials, Inc.
- Priyadarshi Panda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D DRAM STRUCTURE WITH HIGH MOBILITY CHANNEL
- Publication number 20200251151
- Publication date Aug 6, 2020
- Applied Materials, Inc.
- Chang Seok Kang
- G11 - INFORMATION STORAGE
Information Patent Application
Cap Layer For Bit Line Resistance Reduction
- Publication number 20200235104
- Publication date Jul 23, 2020
- Applied Materials, Inc.
- Priyadarshi Panda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND APPARATUS FOR THREE-DIMENSIONAL NAND STRUCTURE FABRICATION
- Publication number 20200235122
- Publication date Jul 23, 2020
- Applied Materials, Inc.
- SUNG-KWAN KANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3-D DRAM Structure With Vertical Bit-Line
- Publication number 20200202900
- Publication date Jun 25, 2020
- Applied Materials, Inc.
- Sung-Kwan Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REDUCING GATE INDUCED DRAIN LEAKAGE IN DRAM WORDLINE
- Publication number 20200176451
- Publication date Jun 4, 2020
- Applied Materials, Inc.
- Sung-Kwan Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL CONTACT LANDING STRUCTURE
- Publication number 20200168440
- Publication date May 28, 2020
- Micromaterials LLC.
- Sung Kwan Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Cap Layer For Bit Line Resistance Reduction
- Publication number 20200126996
- Publication date Apr 23, 2020
- Applied Materials, Inc.
- Priyadarshi Panda
- H01 - BASIC ELECTRIC ELEMENTS

Gill Yong Lee

Person

Patents Grantslast 30 patents

Selection gate separation for 3D NAND

Three-dimensional dynamic random access memory (DRAM) and methods o...

3-D DRAM structure with vertical bit-line

Method to scale dram with self aligned bit line process

3D DRAM structure with high mobility channel

Method of testing a gap fill for DRAM

Reducing gate induced drain leakage in DRAM wordline

Methods and apparatus for three dimensional NAND structure fabrication

Methods and apparatus for three dimensional NAND structure fabrication

3D dram structure with high mobility channel

Gap fill methods of forming buried word lines in DRAM without formi...

Metal contact landing structure

Methods and apparatus for three dimensional NAND structure fabrication

Methods and apparatus for three-dimensional NAND structure fabrication

Reducing gate induced drain leakage in DRAM wordline

Cap layer for bit line resistance reduction

Method and apparatus for substrate fabrication

3D NAND staircase CD fabrication utilizing ruthenium material

Patents Applicationslast 30 patents

DIRECT WORD LINE CONTACT AND METHODS OF MANUFACTURE FOR 3D MEMORY

STRUCTURE AND FABRICATION METHOD OF HIGH VOLTAGE MOSFET WITH A VERT...

NAND CELL STRUCTURE WITH CHARGE TRAP CUT

L-TYPE WORDLINE CONNECTION STRUCTURE FOR THREE-DIMENSIONAL MEMORY

THREE DIMENSIONAL MEMORY DEVICE AND METHOD OF FABRICATION

THREE-DIMENSIONAL DYNAMIC RANDOM ACCESS MEMORY (DRAM) AND METHODS O...

SELECTION GATE STRUCTURE AND FABRICATION METHOD FOR 3D MEMORY

REDUCED STRAIN Si/SiGe HETEROEPITAXY STACKS FOR 3D DRAM

Methods Of Forming Memory Device With Reduced Resistivity

POLY-SILICON BASED WORD LINE FOR 3D MEMORY

METHOD TO SCALE DRAM WITH SELF ALIGNED BIT LINE PROCESS

SELECTION GATE SEPARATION FOR 3D NAND

3D DRAM STRUCTURE WITH HIGH MOBILITY CHANNEL

GAP FILL METHODS FOR DRAM

3-D DRAM Structure With Vertical Bit-Line

METHODS AND APPARATUS FOR THREE DIMENSIONAL NAND STRUCTURE FABRICATION

METHODS AND APPARATUS FOR THREE DIMENSIONAL NAND STRUCTURE FABRICATION

REDUCING GATE INDUCED DRAIN LEAKAGE IN DRAM WORDLINE

METHODS AND APPARATUS FOR THREE DIMENSIONAL NAND STRUCTURE FABRICATION

GAP FILL METHODS FOR DRAM

3D DRAM STRUCTURE WITH HIGH MOBILITY CHANNEL

Cap Layer For Bit Line Resistance Reduction

METHODS AND APPARATUS FOR THREE-DIMENSIONAL NAND STRUCTURE FABRICATION

3-D DRAM Structure With Vertical Bit-Line

REDUCING GATE INDUCED DRAIN LEAKAGE IN DRAM WORDLINE

METAL CONTACT LANDING STRUCTURE

Cap Layer For Bit Line Resistance Reduction