Girish Venkatasubramanian

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Management of the untranslated to translated code steering logic in...
- Patent number 11,372,775
- Issue date Jun 28, 2022
- Intel Corporation
- Girish Venkatasubramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to perform region formation for a dynamic bin...
- Patent number 10,474,442
- Issue date Nov 12, 2019
- Intel Corporation
- Girish Venkatasubramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimized call-return and binary translation
- Patent number 10,191,745
- Issue date Jan 29, 2019
- Intel Corporation
- Hou-Jen Ko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for efficient register allocation and reclamation
- Patent number 10,083,033
- Issue date Sep 25, 2018
- Intel Corporation
- Sebastian Winkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic for scheduling instructions
- Patent number 10,055,256
- Issue date Aug 21, 2018
- Intel Corporation
- Sebastian Winkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to optimize instructions for execution by a p...
- Patent number 9,916,164
- Issue date Mar 13, 2018
- Intel Corporation
- Vineeth Mekkat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to validate translated guest code in a dynami...
- Patent number 9,858,057
- Issue date Jan 2, 2018
- Intel Corporation
- Girish Venkatasubramanian
- F05 - INDEXING SCHEMES RELATING TO ENGINES OR PUMPS IN VARIOUS SUBCLASSES OF...
Information Patent Grant
Providing deterministic, reproducible, and random sampling in a pro...
- Patent number 9,823,938
- Issue date Nov 21, 2017
- Intel Corporation
- Girish Venkatasubramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for facilitating dynamic and efficient management of tran...
- Patent number 9,460,022
- Issue date Oct 4, 2016
- Intel Corporation
- Girish Venkatasubramanian
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Instruction and logic for scheduling instructions
- Patent number 9,274,799
- Issue date Mar 1, 2016
- Intel Corporation
- Sebastian Winkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to validate translated guest code in a dynami...
- Patent number 9,223,553
- Issue date Dec 29, 2015
- Intel Corporation
- Girish Venkatasubramanian
- F05 - INDEXING SCHEMES RELATING TO ENGINES OR PUMPS IN VARIOUS SUBCLASSES OF...

Patents Applicationslast 30 patents

Information Patent Application
MANAGEMENT OF THE UNTRANSLATED TO TRANSLATED CODE STEERING LOGIC IN...
- Publication number 20200174944
- Publication date Jun 4, 2020
- Intel Corporation
- Girish Venkatasubramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSLATION TABLE ENTRY PREFETCHING IN DYNAMIC BINARY TRANSLATION B...
- Publication number 20190179766
- Publication date Jun 13, 2019
- Intel Corporation
- Girish Venkatasubramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGEMENT OF THE UNTRANSLATED TO TRANSLATED CODE STEERING LOGIC IN...
- Publication number 20190163642
- Publication date May 30, 2019
- Intel Corporation
- Girish Venkatasubramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO PERFORM REGION FORMATION FOR A DYNAMIC BIN...
- Publication number 20190102150
- Publication date Apr 4, 2019
- Girish Venkatasubramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIMIZED CALL RETURN
- Publication number 20180285113
- Publication date Oct 4, 2018
- Intel Corporation
- Hou-Jen Ko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROVIDING DETERMINISTIC, REPRODUCIBLE, AND RANDOM SAMPLING IN A PRO...
- Publication number 20160371065
- Publication date Dec 22, 2016
- Girish Venkatasubramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO OPTIMIZE INSTRUCTIONS FOR EXECUTION BY A P...
- Publication number 20160364240
- Publication date Dec 15, 2016
- Intel Corporation
- Vineeth Mekkat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS TO SELECTIVELY EXECUTE A COMMIT INSTRUCTION
- Publication number 20160283247
- Publication date Sep 29, 2016
- Intel Corporation
- Girish Venkatasubramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION AND LOGIC FOR SCHEDULING INSTRUCTIONS
- Publication number 20160274944
- Publication date Sep 22, 2016
- Intel Corporation
- Sebastian Winkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR EFFICIENT REGISTER ALLOCATION AND RECLAMATION
- Publication number 20160266901
- Publication date Sep 15, 2016
- SEBASTIAN WINKEL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION AND LOGIC FOR SCHEDULING INSTRUCTIONS
- Publication number 20160085556
- Publication date Mar 24, 2016
- Intel Corporation
- Sebastian Winkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO VALIDATE TRANSLATED GUEST CODE IN A DYNAMI...
- Publication number 20160085531
- Publication date Mar 24, 2016
- Intel Corporation
- Girish Venkatasubramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO VALIDATE TRANSLATED GUEST CODE IN A DYNAMI...
- Publication number 20150178104
- Publication date Jun 25, 2015
- Girish Venkatasubramanian
- G06 - COMPUTING CALCULATING COUNTING

Girish Venkatasubramanian

Person

Patents Grantslast 30 patents

Management of the untranslated to translated code steering logic in...

Methods and apparatus to perform region formation for a dynamic bin...

Optimized call-return and binary translation

Apparatus and method for efficient register allocation and reclamation

Instruction and logic for scheduling instructions

Methods and apparatus to optimize instructions for execution by a p...

Methods and apparatus to validate translated guest code in a dynami...

Providing deterministic, reproducible, and random sampling in a pro...

Mechanism for facilitating dynamic and efficient management of tran...

Instruction and logic for scheduling instructions

Methods and apparatus to validate translated guest code in a dynami...

Patents Applicationslast 30 patents

MANAGEMENT OF THE UNTRANSLATED TO TRANSLATED CODE STEERING LOGIC IN...

TRANSLATION TABLE ENTRY PREFETCHING IN DYNAMIC BINARY TRANSLATION B...

MANAGEMENT OF THE UNTRANSLATED TO TRANSLATED CODE STEERING LOGIC IN...

METHODS AND APPARATUS TO PERFORM REGION FORMATION FOR A DYNAMIC BIN...

OPTIMIZED CALL RETURN

PROVIDING DETERMINISTIC, REPRODUCIBLE, AND RANDOM SAMPLING IN A PRO...

METHODS AND APPARATUS TO OPTIMIZE INSTRUCTIONS FOR EXECUTION BY A P...

APPARATUSES AND METHODS TO SELECTIVELY EXECUTE A COMMIT INSTRUCTION

INSTRUCTION AND LOGIC FOR SCHEDULING INSTRUCTIONS

APPARATUS AND METHOD FOR EFFICIENT REGISTER ALLOCATION AND RECLAMATION

INSTRUCTION AND LOGIC FOR SCHEDULING INSTRUCTIONS

METHODS AND APPARATUS TO VALIDATE TRANSLATED GUEST CODE IN A DYNAMI...

METHODS AND APPARATUS TO VALIDATE TRANSLATED GUEST CODE IN A DYNAMI...