GIUSEPPE CURELLO

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Penetrating implant for forming a semiconductor device
- Patent number 8,741,720
- Issue date Jun 3, 2014
- Intel Corporation
- Giuseppe Curello
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Penetrating implant for forming a semiconductor device
- Patent number 8,426,927
- Issue date Apr 23, 2013
- Intel Corporation
- Giuseppe Curello
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Selective spacer formation on transistors of different classes on t...
- Patent number 8,174,060
- Issue date May 8, 2012
- Intel Corporation
- Giuseppe Curello
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Selective spacer formation on transistors of different classes on t...
- Patent number 8,154,067
- Issue date Apr 10, 2012
- Intel Corporation
- Giuseppe Curello
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Penetrating implant for forming a semiconductor device
- Patent number 7,943,468
- Issue date May 17, 2011
- Intel Corporation
- Giuseppe Curello
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Active region spacer for semiconductor devices and method to form t...
- Patent number 7,560,780
- Issue date Jul 14, 2009
- Intel Corporation
- Giuseppe Curello
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Selective spacer formation on transistors of different classes on t...
- Patent number 7,541,239
- Issue date Jun 2, 2009
- Intel Corporation
- Giuseppe Curello
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhancing strained device performance by use of multi narrow sectio...
- Patent number 7,482,670
- Issue date Jan 27, 2009
- Intel Corporation
- Giuseppe Curello
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strained silicon MOS device with box layer between the source and d...
- Patent number 7,422,950
- Issue date Sep 9, 2008
- Intel Corporation
- Giuseppe Curello
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device with stepped source/drain region profile
- Patent number 7,335,959
- Issue date Feb 26, 2008
- Intel Corporation
- Giuseppe Curello
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High concentration indium fluorine retrograde wells
- Patent number 7,129,533
- Issue date Oct 31, 2006
- Intel Corporation
- Cory E. Weber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhancing strained device performance by use of multi narrow sectio...
- Patent number 7,101,765
- Issue date Sep 5, 2006
- Intel Corporation
- Giuseppe Curello
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High concentration indium fluorine retrograde wells
- Patent number 6,838,329
- Issue date Jan 4, 2005
- Intel Corporation
- Cory E. Weber
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
PENETRATING IMPLANT FOR FORMING A SEMICONDUCTOR DEVICE
- Publication number 20130224926
- Publication date Aug 29, 2013
- Giuseppe Curello
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PENETRATING IMPLANT FOR FORMING A SEMICONDUCTOR DEVICE
- Publication number 20110215422
- Publication date Sep 8, 2011
- Giuseppe Curello
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELECTIVE SPACER FORMATION ON TRANSISTORS OF DIFFERENT CLASSES ON T...
- Publication number 20110157854
- Publication date Jun 30, 2011
- Giuseppe Curello
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PENETRATING IMPLANT FOR FORMING A SEMICONDUCTOR DEVICE
- Publication number 20090242998
- Publication date Oct 1, 2009
- Giuseppe Curello
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELECTIVE SPACER FORMATION ON TRANSISTORS OF DIFFERENT CLASSES ON T...
- Publication number 20090189193
- Publication date Jul 30, 2009
- Intel Corporation
- GIUSEPPE CURELLO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Short channel effect of MOS devices by retrograde well engineering...
- Publication number 20080311720
- Publication date Dec 18, 2008
- Thomas Hoffman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Selective spacer formation on transistors of different classes on t...
- Publication number 20080003746
- Publication date Jan 3, 2008
- Giuseppe Curello
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of fabricating a MOSFET transistor having an anti-halo for m...
- Publication number 20070145495
- Publication date Jun 28, 2007
- Intel Corporation
- Giuseppe Curello
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Isolation body for semiconductor devices and method to form the same
- Publication number 20070132034
- Publication date Jun 14, 2007
- Giuseppe Curello
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Active region spacer for semiconductor devices and method to form t...
- Publication number 20070132057
- Publication date Jun 14, 2007
- Giuseppe Curello
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Strained silicon MOS device with box layer between the source and d...
- Publication number 20070134859
- Publication date Jun 14, 2007
- Intel Corporation
- Giuseppe Curello
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Enhancing strained device performance by use of multi narrow sectio...
- Publication number 20060208337
- Publication date Sep 21, 2006
- Giuseppe Curello
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Device with stepped source/drain region profile
- Publication number 20060145273
- Publication date Jul 6, 2006
- Giuseppe Curello
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Short channel effect of MOS devices by retrograde well engineering...
- Publication number 20060065937
- Publication date Mar 30, 2006
- Thomas Hoffmann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Enhancing strained device performance by use of multi narrow sectio...
- Publication number 20050221566
- Publication date Oct 6, 2005
- Giuseppe Curello
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
High concentration indium fluorine retrograde wells
- Publication number 20040192055
- Publication date Sep 30, 2004
- Cory E. Weber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
High concentration indium fluorine retrograde wells
- Publication number 20040188767
- Publication date Sep 30, 2004
- Cory E. Weber
- H01 - BASIC ELECTRIC ELEMENTS

GIUSEPPE CURELLO

Person

Patents Grantslast 30 patents

Penetrating implant for forming a semiconductor device

Penetrating implant for forming a semiconductor device

Selective spacer formation on transistors of different classes on t...

Selective spacer formation on transistors of different classes on t...

Penetrating implant for forming a semiconductor device

Active region spacer for semiconductor devices and method to form t...

Selective spacer formation on transistors of different classes on t...

Enhancing strained device performance by use of multi narrow sectio...

Strained silicon MOS device with box layer between the source and d...

Device with stepped source/drain region profile

High concentration indium fluorine retrograde wells

Enhancing strained device performance by use of multi narrow sectio...

High concentration indium fluorine retrograde wells

Patents Applicationslast 30 patents

PENETRATING IMPLANT FOR FORMING A SEMICONDUCTOR DEVICE

PENETRATING IMPLANT FOR FORMING A SEMICONDUCTOR DEVICE

SELECTIVE SPACER FORMATION ON TRANSISTORS OF DIFFERENT CLASSES ON T...

PENETRATING IMPLANT FOR FORMING A SEMICONDUCTOR DEVICE

SELECTIVE SPACER FORMATION ON TRANSISTORS OF DIFFERENT CLASSES ON T...

Short channel effect of MOS devices by retrograde well engineering...

Selective spacer formation on transistors of different classes on t...

Method of fabricating a MOSFET transistor having an anti-halo for m...

Isolation body for semiconductor devices and method to form the same

Active region spacer for semiconductor devices and method to form t...

Strained silicon MOS device with box layer between the source and d...

Enhancing strained device performance by use of multi narrow sectio...

Device with stepped source/drain region profile

Short channel effect of MOS devices by retrograde well engineering...

Enhancing strained device performance by use of multi narrow sectio...

High concentration indium fluorine retrograde wells

High concentration indium fluorine retrograde wells