Giuseppina Puzzilli

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Partitioned memory having error detection capability
- Patent number 12,026,052
- Issue date Jul 2, 2024
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mitigating slow read disturb in a memory sub-system
- Patent number 11,941,285
- Issue date Mar 26, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implementing fault tolerant page stripes on low density memory systems
- Patent number 11,899,966
- Issue date Feb 13, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Latent read disturb mitigation in memory devices
- Patent number 11,847,335
- Issue date Dec 19, 2023
- Micron Technology, Inc.
- Pitamber Shukla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Read calibration based on ranges of program/erase cycles
- Patent number 11,797,216
- Issue date Oct 24, 2023
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Separate partition for buffer and snapshot memory
- Patent number 11,789,629
- Issue date Oct 17, 2023
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Threshold voltage based on program/erase cycles
- Patent number 11,776,629
- Issue date Oct 3, 2023
- Micron Technology, Inc.
- Niccolo′ Righetti
- G11 - INFORMATION STORAGE
Information Patent Grant
Partitions within snapshot memory for buffer and snapshot memory
- Patent number 11,775,208
- Issue date Oct 3, 2023
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storing highly read data at low impact read disturb pages of a memo...
- Patent number 11,762,767
- Issue date Sep 19, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adjusting a preprogram voltage based on use of a memory device
- Patent number 11,709,616
- Issue date Jul 25, 2023
- Micron Technology, Inc.
- Priya Venkataraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Read voltage calibration for copyback operation
- Patent number 11,694,763
- Issue date Jul 4, 2023
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Read window based on program/erase cycles
- Patent number 11,688,479
- Issue date Jun 27, 2023
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G11 - INFORMATION STORAGE
Information Patent Grant
Threshold voltage distribution adjustment for buffer
- Patent number 11,663,104
- Issue date May 30, 2023
- Micron Technology, Inc.
- Jeffrey S. McNeil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data management during a copyback operation
- Patent number 11,556,267
- Issue date Jan 17, 2023
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Trims corresponding to logical unit quantity
- Patent number 11,487,436
- Issue date Nov 1, 2022
- Micron Technology, Inc.
- Jeffrey S. McNeil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partitioned memory having error detection capability
- Patent number 11,481,273
- Issue date Oct 25, 2022
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Temperature-dependent operations in a memory device
- Patent number 11,468,949
- Issue date Oct 11, 2022
- Micron Technology, Inc.
- Pitamber Shukla
- G11 - INFORMATION STORAGE
Information Patent Grant
Adjusting a preprogram voltage based on use of a memory device
- Patent number 11,461,035
- Issue date Oct 4, 2022
- Micron Technology, Inc.
- Priya Venkataraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implementing fault tolerant page stripes on low density memory systems
- Patent number 11,449,271
- Issue date Sep 20, 2022
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Setting an initial erase voltage using feedback from previous opera...
- Patent number 11,443,812
- Issue date Sep 13, 2022
- Micron Technology, Inc.
- Scott A. Stoller
- G11 - INFORMATION STORAGE
Information Patent Grant
Trims corresponding to program/erase cycles
- Patent number 11,437,111
- Issue date Sep 6, 2022
- Micron Technology, Inc.
- Jeffrey S. McNeil
- G11 - INFORMATION STORAGE
Information Patent Grant
Determining a read voltage based on a change in a read window
- Patent number 11,430,528
- Issue date Aug 30, 2022
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G11 - INFORMATION STORAGE
Information Patent Grant
Read calibration based on ranges of program/erase cycles
- Patent number 11,392,312
- Issue date Jul 19, 2022
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Separate partition for buffer and snapshot memory
- Patent number 11,385,819
- Issue date Jul 12, 2022
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partitions within snapshot memory for buffer and snapshot memory
- Patent number 11,360,700
- Issue date Jun 14, 2022
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Read voltage calibration for copyback operation
- Patent number 11,309,052
- Issue date Apr 19, 2022
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Separate trims for buffer and snapshot
- Patent number 11,301,346
- Issue date Apr 12, 2022
- Micron Technology, Inc.
- Todd A. Marquart
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Threshold voltage distribution adjustment for buffer
- Patent number 11,288,160
- Issue date Mar 29, 2022
- Micron Technology, Inc.
- Jeffrey S. McNeil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Read window based on program/erase cycles
- Patent number 11,189,355
- Issue date Nov 30, 2021
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for per-deck erase verify and dynamic inhibit...
- Patent number 10,346,088
- Issue date Jul 9, 2019
- Intel Corporation
- Niccolo Righetti
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MITIGATING SLOW READ DISTURB IN A MEMORY SUB-SYSTEM
- Publication number 20240184481
- Publication date Jun 6, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIMULTANEOUS STATISTICAL MULTI-SUBBLOCK VERIFY FOR NAND MEMORIES
- Publication number 20240136002
- Publication date Apr 25, 2024
- Intel NDTM US LLC
- Tarek Ahmed AMEEN BESHARI
- G11 - INFORMATION STORAGE
Information Patent Application
DECK RESET READ
- Publication number 20240127896
- Publication date Apr 18, 2024
- Intel NDTM US LLC
- Chao ZHANG
- G11 - INFORMATION STORAGE
Information Patent Application
PARTITIONED MEMORY HAVING ERROR DETECTION CAPABILITY
- Publication number 20230044883
- Publication date Feb 9, 2023
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADJUSTING A PREPROGRAM VOLTAGE BASED ON USE OF A MEMORY DEVICE
- Publication number 20220391125
- Publication date Dec 8, 2022
- Micron Technology, Inc.
- Priya Venkataraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMPLEMENTING FAULT TOLERANT PAGE STRIPES ON LOW DENSITY MEMORY SYSTEMS
- Publication number 20220357873
- Publication date Nov 10, 2022
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEPARATE PARTITION FOR BUFFER AND SNAPSHOT MEMORY
- Publication number 20220350517
- Publication date Nov 3, 2022
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
READ CALIBRATION BASED ON RANGES OF PROGRAM/ERASE CYCLES
- Publication number 20220350520
- Publication date Nov 3, 2022
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORING HIGHLY READ DATA AT LOW IMPACT READ DISTURB PAGES OF A MEMO...
- Publication number 20220342813
- Publication date Oct 27, 2022
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MITIGATING SLOW READ DISTURB IN A MEMORY SUB-SYSTEM
- Publication number 20220334756
- Publication date Oct 20, 2022
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LATENT READ DISTURB MITIGATION IN MEMORY DEVICES
- Publication number 20220308778
- Publication date Sep 29, 2022
- Micron Technology, Inc.
- Pitamber Shukla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEMPERATURE-DEPENDENT OPERATIONS IN A MEMORY DEVICE
- Publication number 20220293184
- Publication date Sep 15, 2022
- Micron Technology, Inc.
- Pitamber Shukla
- G11 - INFORMATION STORAGE
Information Patent Application
PARTITIONS WITHIN SNAPSHOT MEMORY FOR BUFFER AND SNAPSHOT MEMORY
- Publication number 20220291865
- Publication date Sep 15, 2022
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
READ VOLTAGE CALIBRATION FOR COPYBACK OPERATION
- Publication number 20220215895
- Publication date Jul 7, 2022
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADJUSTING A PREPROGRAM VOLTAGE BASED ON USE OF A MEMORY DEVICE
- Publication number 20220197536
- Publication date Jun 23, 2022
- Micron Technology, Inc.
- Priya Venkataraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THRESHOLD VOLTAGE DISTRIBTUTION ADJUSTMENT FOR BUFFER
- Publication number 20220197771
- Publication date Jun 23, 2022
- Micron Technology, Inc.
- Jeffrey S. McNeil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SETTING AN INITIAL ERASE VOLTAGE USING FEEDBACK FROM PREVIOUS OPERA...
- Publication number 20220199163
- Publication date Jun 23, 2022
- Micron Technology, Inc.
- Scott A. Stoller
- G11 - INFORMATION STORAGE
Information Patent Application
TRIMS CORRESPONDING TO PROGRAM/ERASE CYCLES
- Publication number 20220189571
- Publication date Jun 16, 2022
- Micron Technology, Inc.
- Jeffrey S. McNeil
- G11 - INFORMATION STORAGE
Information Patent Application
DATA MANAGEMENT DURING A COPYBACK OPERATION
- Publication number 20220066642
- Publication date Mar 3, 2022
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETERMINING A READ VOLTAGE BASED ON A CHANGE IN A READ WINDOW
- Publication number 20220068407
- Publication date Mar 3, 2022
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G11 - INFORMATION STORAGE
Information Patent Application
READ WINDOW BASED ON PROGRAM/ERASE CYCLES
- Publication number 20220068412
- Publication date Mar 3, 2022
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G11 - INFORMATION STORAGE
Information Patent Application
SEPARATE TRIMS FOR BUFFER AND SNAPSHOT
- Publication number 20220066898
- Publication date Mar 3, 2022
- Micron Technology, Inc.
- Todd A. Marquart
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
READ VOLTAGE CALIBRATION FOR COPYBACK OPERATION
- Publication number 20220068426
- Publication date Mar 3, 2022
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
READ CALIBRATION BASED ON RANGES OF PROGRAM/ERASE CYCLES
- Publication number 20220066677
- Publication date Mar 3, 2022
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRIM DETERMINATION BASED ON POWER AVAILABILITY
- Publication number 20220057944
- Publication date Feb 24, 2022
- Micron Technology, Inc.
- Jeremy Binfet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTITIONED MEMORY HAVING ERROR DETECTION CAPABILITY
- Publication number 20220050746
- Publication date Feb 17, 2022
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRIMS CORRESPONDING TO LOGICAL UNIT QUANTITY
- Publication number 20220050601
- Publication date Feb 17, 2022
- Micron Technology, Inc.
- Jeffrey S. McNeil Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTITIONS WITHIN SNAPSHOT MEMORY FOR BUFFER AND SNAPSHOT MEMORY
- Publication number 20220050625
- Publication date Feb 17, 2022
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THRESHOLD VOLTAGE DISTRIBTUTION ADJUSTMENT FOR BUFFER
- Publication number 20220050759
- Publication date Feb 17, 2022
- Micron Technology, Inc.
- Jeffrey S. McNeil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THRESHOLD VOLTAGE BASED ON PROGRAM/ERASE CYCLES
- Publication number 20220051722
- Publication date Feb 17, 2022
- Micron Technology, Inc.
- Niccolo' Righetti
- G11 - INFORMATION STORAGE

Giuseppina Puzzilli

Person

Patents Grantslast 30 patents

Partitioned memory having error detection capability

Mitigating slow read disturb in a memory sub-system

Implementing fault tolerant page stripes on low density memory systems

Latent read disturb mitigation in memory devices

Read calibration based on ranges of program/erase cycles

Separate partition for buffer and snapshot memory

Threshold voltage based on program/erase cycles

Partitions within snapshot memory for buffer and snapshot memory

Storing highly read data at low impact read disturb pages of a memo...

Adjusting a preprogram voltage based on use of a memory device

Read voltage calibration for copyback operation

Read window based on program/erase cycles

Threshold voltage distribution adjustment for buffer

Data management during a copyback operation

Trims corresponding to logical unit quantity

Partitioned memory having error detection capability

Temperature-dependent operations in a memory device

Adjusting a preprogram voltage based on use of a memory device

Implementing fault tolerant page stripes on low density memory systems

Setting an initial erase voltage using feedback from previous opera...

Trims corresponding to program/erase cycles

Determining a read voltage based on a change in a read window

Read calibration based on ranges of program/erase cycles

Separate partition for buffer and snapshot memory

Partitions within snapshot memory for buffer and snapshot memory

Read voltage calibration for copyback operation

Separate trims for buffer and snapshot

Threshold voltage distribution adjustment for buffer

Read window based on program/erase cycles

Method and apparatus for per-deck erase verify and dynamic inhibit...

Patents Applicationslast 30 patents

MITIGATING SLOW READ DISTURB IN A MEMORY SUB-SYSTEM

SIMULTANEOUS STATISTICAL MULTI-SUBBLOCK VERIFY FOR NAND MEMORIES

DECK RESET READ

PARTITIONED MEMORY HAVING ERROR DETECTION CAPABILITY

ADJUSTING A PREPROGRAM VOLTAGE BASED ON USE OF A MEMORY DEVICE

IMPLEMENTING FAULT TOLERANT PAGE STRIPES ON LOW DENSITY MEMORY SYSTEMS

SEPARATE PARTITION FOR BUFFER AND SNAPSHOT MEMORY

READ CALIBRATION BASED ON RANGES OF PROGRAM/ERASE CYCLES

STORING HIGHLY READ DATA AT LOW IMPACT READ DISTURB PAGES OF A MEMO...

MITIGATING SLOW READ DISTURB IN A MEMORY SUB-SYSTEM

LATENT READ DISTURB MITIGATION IN MEMORY DEVICES

TEMPERATURE-DEPENDENT OPERATIONS IN A MEMORY DEVICE

PARTITIONS WITHIN SNAPSHOT MEMORY FOR BUFFER AND SNAPSHOT MEMORY

READ VOLTAGE CALIBRATION FOR COPYBACK OPERATION

ADJUSTING A PREPROGRAM VOLTAGE BASED ON USE OF A MEMORY DEVICE

THRESHOLD VOLTAGE DISTRIBTUTION ADJUSTMENT FOR BUFFER

SETTING AN INITIAL ERASE VOLTAGE USING FEEDBACK FROM PREVIOUS OPERA...

TRIMS CORRESPONDING TO PROGRAM/ERASE CYCLES

DATA MANAGEMENT DURING A COPYBACK OPERATION

DETERMINING A READ VOLTAGE BASED ON A CHANGE IN A READ WINDOW

READ WINDOW BASED ON PROGRAM/ERASE CYCLES

SEPARATE TRIMS FOR BUFFER AND SNAPSHOT

READ VOLTAGE CALIBRATION FOR COPYBACK OPERATION

READ CALIBRATION BASED ON RANGES OF PROGRAM/ERASE CYCLES

TRIM DETERMINATION BASED ON POWER AVAILABILITY

PARTITIONED MEMORY HAVING ERROR DETECTION CAPABILITY

TRIMS CORRESPONDING TO LOGICAL UNIT QUANTITY

PARTITIONS WITHIN SNAPSHOT MEMORY FOR BUFFER AND SNAPSHOT MEMORY

THRESHOLD VOLTAGE DISTRIBTUTION ADJUSTMENT FOR BUFFER

THRESHOLD VOLTAGE BASED ON PROGRAM/ERASE CYCLES