GLENN A BIERY

Person

HYDE PARK, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
High performance CMOS circuits, and methods for fabricating same
- Patent number 8,383,483
- Issue date Feb 26, 2013
- International Business Machines Corporation
- John C. Arnold
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for the formation of fully silicided metal gates
- Patent number 8,178,433
- Issue date May 15, 2012
- International Business Machines Corporation
- Glenn A. Biery
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for the formation of fully silicided metal gates
- Patent number 7,705,405
- Issue date Apr 27, 2010
- International Business Machines Corporation
- Glenn A. Biery
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fully silicided metal gate semiconductor device structure
- Patent number 7,473,975
- Issue date Jan 6, 2009
- International Business Machines Corporation
- Glenn A. Biery
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation of fully silicided (FUSI) gate using a dual silicide process
- Patent number 7,273,777
- Issue date Sep 25, 2007
- International Business Machines Corporation
- Glenn A. Biery
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reliable low-k interconnect structure with hybrid dielectric
- Patent number 7,135,398
- Issue date Nov 14, 2006
- International Business Machines Corporation
- John A. Fitzsimmons
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual damascene interconnect structure using low stress fluorosilica...
- Patent number 7,034,400
- Issue date Apr 25, 2006
- International Business Machines Corporation
- Edward P. Barth
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Two-mask process for metal-insulator-metal capacitors and single ma...
- Patent number 6,933,191
- Issue date Aug 23, 2005
- International Business Machines Corporation
- Glenn A. Biery
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reliable low-k interconnect structure with hybrid dielectric
- Patent number 6,917,108
- Issue date Jul 12, 2005
- International Business Machines Corporation
- John A. Fitzsimmons
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned, lateral diffusion barrier in metal lines to eliminate...
- Patent number 6,597,067
- Issue date Jul 22, 2003
- International Business Machines Corporation
- Glenn Allen Biery
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Topography monitor
- Patent number 5,952,674
- Issue date Sep 14, 1999
- International Business Machines Corporation
- Daniel C. Edelstein
- G01 - MEASURING TESTING
Information Patent Grant
Dual channel d.c. low noise measurement system and test methodology
- Patent number 5,563,517
- Issue date Oct 8, 1996
- International Business Machines Corporation
- Glenn A. Biery
- G01 - MEASURING TESTING
Information Patent Grant
Method of making self-aligned, lateral diffusion barrier in metal l...
- Patent number 5,470,788
- Issue date Nov 28, 1995
- International Business Machines Corporation
- Glenn A. Biery
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual channel D.C. low noise measurement system and test methodology
- Patent number 5,434,385
- Issue date Jul 18, 1995
- International Business Machines Corporation
- Glenn A. Biery
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
HIGH PERFORMANCE CMOS CIRCUITS, AND METHODS FOR FABRICATING SAME
- Publication number 20100041221
- Publication date Feb 18, 2010
- International Business Machines Coporation
- John C. Arnold
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR THE FORMATION OF FULLY SILICIDED METAL GATES
- Publication number 20090029515
- Publication date Jan 29, 2009
- International Business Machines Corporation
- Glenn A. Biery
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FORMATION OF FULLY SILICIDED (FUSI) GATE USING A DUAL SILICIDE PROCESS
- Publication number 20070281431
- Publication date Dec 6, 2007
- International Business Machines Corporation
- Glenn A. Biery
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
High performance CMOS circuits, and methods for fabricating the same
- Publication number 20070152276
- Publication date Jul 5, 2007
- International Business Machines Corporation
- John C. Arnold
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Formation of fully silicided (FUSI) gate using a dual silicide process
- Publication number 20070032010
- Publication date Feb 8, 2007
- International Business Machines Corporation
- Glenn A. Biery
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods for the formation of fully silicided metal gates
- Publication number 20060006476
- Publication date Jan 12, 2006
- International Business Machines Corporation
- Glenn A. Biery
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TWO-MASK PROCESS FOR METAL-INSULATOR-METAL CAPACITORS AND SINGLE MA...
- Publication number 20050064658
- Publication date Mar 24, 2005
- International Business Machines Corporation
- Glenn A. Biery
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Reliable low-k interconnect structure with hybrid dielectric
- Publication number 20050023693
- Publication date Feb 3, 2005
- John A. Fitzsimmons
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Reliable low-k interconnect structure with hybrid dielectric
- Publication number 20040094839
- Publication date May 20, 2004
- International Business Machines Corporation
- John A. Fitzsimmons
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dual damascene interconnect structure using low stress fluorosilica...
- Publication number 20040061235
- Publication date Apr 1, 2004
- Edward P. Barth
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL DAMASCENE INTERCONNECT STRUCTURE USING LOW STRESS FLOUROSILICA...
- Publication number 20020076917
- Publication date Jun 20, 2002
- EDWARD P BARTH
- H01 - BASIC ELECTRIC ELEMENTS

GLENN A BIERY

Person

Patents Grantslast 30 patents

High performance CMOS circuits, and methods for fabricating same

Methods for the formation of fully silicided metal gates

Methods for the formation of fully silicided metal gates

Fully silicided metal gate semiconductor device structure

Formation of fully silicided (FUSI) gate using a dual silicide process

Reliable low-k interconnect structure with hybrid dielectric

Dual damascene interconnect structure using low stress fluorosilica...

Two-mask process for metal-insulator-metal capacitors and single ma...

Reliable low-k interconnect structure with hybrid dielectric

Self-aligned, lateral diffusion barrier in metal lines to eliminate...

Topography monitor

Dual channel d.c. low noise measurement system and test methodology

Method of making self-aligned, lateral diffusion barrier in metal l...

Dual channel D.C. low noise measurement system and test methodology

Patents Applicationslast 30 patents

HIGH PERFORMANCE CMOS CIRCUITS, AND METHODS FOR FABRICATING SAME

METHODS FOR THE FORMATION OF FULLY SILICIDED METAL GATES

FORMATION OF FULLY SILICIDED (FUSI) GATE USING A DUAL SILICIDE PROCESS

High performance CMOS circuits, and methods for fabricating the same

Formation of fully silicided (FUSI) gate using a dual silicide process

Methods for the formation of fully silicided metal gates

TWO-MASK PROCESS FOR METAL-INSULATOR-METAL CAPACITORS AND SINGLE MA...

Reliable low-k interconnect structure with hybrid dielectric

Reliable low-k interconnect structure with hybrid dielectric

Dual damascene interconnect structure using low stress fluorosilica...

DUAL DAMASCENE INTERCONNECT STRUCTURE USING LOW STRESS FLOUROSILICA...