Gordon Bernard BELL

Person

Madison, WI, US

People

Patents Grantslast 30 patents

Information Patent Grant
Out-of-order checkpoint reclamation in a checkpoint processing and...
- Patent number 9,262,170
- Issue date Feb 16, 2016
- International Business Machines Corporation
- Anil Krishna
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Store-to-load forwarding mechanism for processor runahead mode oper...
- Patent number 8,639,886
- Issue date Jan 28, 2014
- International Business Machines Corporation
- Gordon Bell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic adjustment of read/write ratio of a disk cache
- Patent number 8,572,325
- Issue date Oct 29, 2013
- International Business Machines Corporation
- Ganesh Balakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prefetching with multiple processors and threads via a coherency bus
- Patent number 8,543,767
- Issue date Sep 24, 2013
- International Business Machines Corporation
- Gordon B. Bell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Effective prefetching with multiple processors and threads
- Patent number 8,200,905
- Issue date Jun 12, 2012
- International Business Machines Corporation
- Gordon Bernard Bell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache management through delayed writeback
- Patent number 8,140,767
- Issue date Mar 20, 2012
- International Business Machines Corporation
- Gordon Bernard Bell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data reorganization in non-uniform cache access caches
- Patent number 8,140,758
- Issue date Mar 20, 2012
- International Business Machines Corporation
- Ganesh Balakrishnan
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Out-of-Order Checkpoint Reclamation in a Checkpoint Processing and...
- Publication number 20140032884
- Publication date Jan 30, 2014
- International Business Machines Corporation
- Anil Krishna
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFECTIVE PREFETCHING WITH MULTIPLE PROCESSORS AND THREADS
- Publication number 20120246406
- Publication date Sep 27, 2012
- International Business Machines Corporation
- Gordon Bernard BELL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC ADJUSTMENT OF READ/WRITE RATIO OF A DISK CACHE
- Publication number 20120144109
- Publication date Jun 7, 2012
- International Business Machines Corporation
- Ganesh Balakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cache Management Through Delayed Writeback
- Publication number 20100312970
- Publication date Dec 9, 2010
- International Business Machines Corporation
- Gordon B. Bell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA REORGANIZATION IN NON-UNIFORM CACHE ACCESS CACHES
- Publication number 20100274973
- Publication date Oct 28, 2010
- International Business Machines Corporation
- Ganesh Balakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORE-TO-LOAD FORWARDING MECHANISM FOR PROCESSOR RUNAHEAD MODE OPER...
- Publication number 20100199045
- Publication date Aug 5, 2010
- International Buisness Machines Corporation
- Gordon Bell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SNOOP-BASED PREFETCHING
- Publication number 20100042786
- Publication date Feb 18, 2010
- International Business Machines Corporation
- Gordon Bernard BELL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cache Memory with Extended Set-associativity of Partner Sets
- Publication number 20090157968
- Publication date Jun 18, 2009
- International Business Machines Corporation
- Gordon B. Bell
- G06 - COMPUTING CALCULATING COUNTING

Gordon Bernard BELL

Person

Patents Grantslast 30 patents

Out-of-order checkpoint reclamation in a checkpoint processing and...

Store-to-load forwarding mechanism for processor runahead mode oper...

Dynamic adjustment of read/write ratio of a disk cache

Prefetching with multiple processors and threads via a coherency bus

Effective prefetching with multiple processors and threads

Cache management through delayed writeback

Data reorganization in non-uniform cache access caches

Patents Applicationslast 30 patents

Out-of-Order Checkpoint Reclamation in a Checkpoint Processing and...

EFFECTIVE PREFETCHING WITH MULTIPLE PROCESSORS AND THREADS

DYNAMIC ADJUSTMENT OF READ/WRITE RATIO OF A DISK CACHE

Cache Management Through Delayed Writeback

DATA REORGANIZATION IN NON-UNIFORM CACHE ACCESS CACHES

STORE-TO-LOAD FORWARDING MECHANISM FOR PROCESSOR RUNAHEAD MODE OPER...

SNOOP-BASED PREFETCHING

Cache Memory with Extended Set-associativity of Partner Sets