Grace Sun

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Mountain View, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for forming a memory structure having an elect...
- Patent number 7,132,336
- Issue date Nov 7, 2006
- LSI Logic Corporation
- Sheldon Aronowitz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for creating barrier layers for copper diffusion
- Patent number 6,998,343
- Issue date Feb 14, 2006
- LSI Logic Corporation
- Grace Sun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device having an electron trapping layer in a high-K dielect...
- Patent number 6,989,565
- Issue date Jan 24, 2006
- LSI Logic Corporation
- Sheldon Aronowitz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Calcium doped polysilicon gate electrodes
- Patent number 6,930,362
- Issue date Aug 16, 2005
- LSI Logic Corporation
- Mohammad R. Mirabedini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High-K dielectric gate material uniquely formed
- Patent number 6,919,263
- Issue date Jul 19, 2005
- LSI Logic Corporation
- Sheldon Aronowitz
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...

Patents Applicationslast 30 patents

Information Patent Application
Memory device having an electron trapping layer in a high-K dielect...
- Publication number 20050258475
- Publication date Nov 24, 2005
- LSI Logic Corporation
- Sheldon Aronowitz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for creating barriers to metal contamination in silicon oxides
- Publication number 20040121550
- Publication date Jun 24, 2004
- Vladimir Zubkov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
High-K dielectric gate material uniquely formed
- Publication number 20040089887
- Publication date May 13, 2004
- LSI Logic Corporation
- Sheldon Aronowitz
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...