Greg M. Hess

Person

Mountain View, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
System control using sparse data
- Patent number 12,072,810
- Issue date Aug 27, 2024
- Apple Inc.
- Michael R. Seningen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System control using sparse data
- Patent number 11,803,480
- Issue date Oct 31, 2023
- Apple Inc.
- Michael R. Seningen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient retention flop utilizing different voltage domain
- Patent number 11,418,174
- Issue date Aug 16, 2022
- Apple Inc.
- Greg M. Hess
- G11 - INFORMATION STORAGE
Information Patent Grant
System control using sparse data
- Patent number 11,327,896
- Issue date May 10, 2022
- Apple Inc.
- Michael R. Seningen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient retention flop utilizing different voltage domain
- Patent number 11,005,459
- Issue date May 11, 2021
- Apple Inc.
- Greg M. Hess
- G11 - INFORMATION STORAGE
Information Patent Grant
Power switch multiplexer with configurable overlap
- Patent number 10,908,663
- Issue date Feb 2, 2021
- Apple Inc.
- Victor Zyuban
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Supply tracking delay element in multiple power domain designs
- Patent number 10,833,664
- Issue date Nov 10, 2020
- Apple Inc.
- Greg M. Hess
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System control using sparse data
- Patent number 10,691,610
- Issue date Jun 23, 2020
- Apple Inc.
- Michael R. Seningen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low leakage power switch
- Patent number 10,523,194
- Issue date Dec 31, 2019
- Apple Inc.
- Jaroslav Raszka
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Pulsed sub-VDD precharging of a bit line
- Patent number 10,453,505
- Issue date Oct 22, 2019
- Apple Inc.
- Greg M. Hess
- G11 - INFORMATION STORAGE
Information Patent Grant
Global bit line pre-charging and data latching in multi-banked memo...
- Patent number 10,217,494
- Issue date Feb 26, 2019
- Apple Inc.
- Bharan Giridhar
- G11 - INFORMATION STORAGE
Information Patent Grant
Power grid segmentation for memory arrays
- Patent number 9,529,533
- Issue date Dec 27, 2016
- Apple Inc.
- Michael A. Dreesen
- G11 - INFORMATION STORAGE
Information Patent Grant
Shared gate fed sense amplifier
- Patent number 9,455,000
- Issue date Sep 27, 2016
- Apple Inc.
- Ramesh Arvapalli
- G11 - INFORMATION STORAGE
Information Patent Grant
Selectable phase or cycle jitter detector
- Patent number 9,389,635
- Issue date Jul 12, 2016
- Apple Inc.
- Greg M Hess
- G11 - INFORMATION STORAGE
Information Patent Grant
Configurable voltage reduction for register file
- Patent number 9,311,967
- Issue date Apr 12, 2016
- Apple Inc.
- Ajay Kumar Bhatia
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and circuits for low latency initialization of static random...
- Patent number 9,286,971
- Issue date Mar 15, 2016
- Apple Inc.
- Greg M. Hess
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic global memory bit line usage as storage node
- Patent number 9,236,100
- Issue date Jan 12, 2016
- Apple Inc.
- Greg M. Hess
- G11 - INFORMATION STORAGE
Information Patent Grant
Register file write ring oscillator
- Patent number 9,230,690
- Issue date Jan 5, 2016
- Apple Inc.
- Greg M Hess
- G11 - INFORMATION STORAGE
Information Patent Grant
Selectable phase or cycle jitter detector
- Patent number 9,207,705
- Issue date Dec 8, 2015
- Apple Inc.
- Greg M Hess
- G01 - MEASURING TESTING
Information Patent Grant
Efficient handling of misaligned loads and stores
- Patent number 9,131,899
- Issue date Sep 15, 2015
- Apple Inc.
- Hari S. Kannan
- A61 - MEDICAL OR VETERINARY SCIENCE HYGIENE
Information Patent Grant
Apparatus to suppress concurrent read and write word line access of...
- Patent number 9,001,593
- Issue date Apr 7, 2015
- Apple Inc.
- Hitesh Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier soft-fail detection circuit
- Patent number 8,988,957
- Issue date Mar 24, 2015
- Apple Inc.
- Greg M Hess
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic level shifter circuit and ring oscillator using the same
- Patent number 8,912,853
- Issue date Dec 16, 2014
- Apple Inc.
- James E. Burnette
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Zero keeper circuit with full design-for-test coverage
- Patent number 8,860,464
- Issue date Oct 14, 2014
- Apple Inc.
- Hitesh K Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for power domain isolation during power down
- Patent number 8,570,788
- Issue date Oct 29, 2013
- Apple Inc.
- Greg M. Hess
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiplexer with level shifter
- Patent number 8,558,603
- Issue date Oct 15, 2013
- Apple Inc.
- Greg M. Hess
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Level shifter with embedded logic and low minimum voltage
- Patent number 8,476,930
- Issue date Jul 2, 2013
- Apple Inc.
- Brian J. Campbell
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Leakage and NBTI reduction technique for memory
- Patent number 8,395,954
- Issue date Mar 12, 2013
- Apple Inc.
- Brian J. Campbell
- G11 - INFORMATION STORAGE
Information Patent Grant
Leakage and NBTI reduction technique for memory
- Patent number 8,203,898
- Issue date Jun 19, 2012
- Apple Inc.
- Brian J. Campbell
- G11 - INFORMATION STORAGE
Information Patent Grant
Passgate for dynamic circuitry
- Patent number 8,174,918
- Issue date May 8, 2012
- Apple Inc.
- Greg M. Hess
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
System Control Using Sparse Data
- Publication number 20250013576
- Publication date Jan 9, 2025
- Apple Inc.
- Michael R. Seningen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System Control Using Sparse Data
- Publication number 20240111685
- Publication date Apr 4, 2024
- Apple Inc.
- Michael R. Seningen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System Control Using Sparse Data
- Publication number 20220269617
- Publication date Aug 25, 2022
- Apple Inc.
- Michael R. Seningen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Bit Cell for In-Memory Computation
- Publication number 20220101914
- Publication date Mar 31, 2022
- Apple Inc.
- Michael A. Dreesen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Efficient Retention Flop Utilizing Different Voltage Domain
- Publication number 20210250019
- Publication date Aug 12, 2021
- Apple Inc.
- Greg M. Hess
- G11 - INFORMATION STORAGE
Information Patent Application
Power Switch Multiplexer with Configurable Overlap
- Publication number 20200387205
- Publication date Dec 10, 2020
- Apple Inc.
- Victor Zyuban
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System Control Using Sparse Data
- Publication number 20200320013
- Publication date Oct 8, 2020
- Apple Inc.
- Michael R. Seningen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PULSED SUB-VDD PRECHARGING OF A BIT LINE
- Publication number 20190272859
- Publication date Sep 5, 2019
- Apple Inc.
- Greg M. Hess
- G11 - INFORMATION STORAGE
Information Patent Application
LOW LEAKAGE POWER SWITCH
- Publication number 20190097622
- Publication date Mar 28, 2019
- Apple Inc.
- Jaroslav Raszka
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEM CONTROL USING SPARSE DATA
- Publication number 20190095339
- Publication date Mar 28, 2019
- Apple Inc.
- Michael R. Seningen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUPPLY TRACKING DELAY ELEMENT IN MULTIPLE POWER DOMAIN DESIGNS
- Publication number 20190052254
- Publication date Feb 14, 2019
- Apple Inc.
- Greg M. Hess
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
GLOBAL BIT LINE PRE-CHARGING AND DATA LATCHING IN MULTI-BANKED MEMO...
- Publication number 20190005993
- Publication date Jan 3, 2019
- Apple Inc.
- Bharan Giridhar
- G11 - INFORMATION STORAGE
Information Patent Application
SHARED GATE FED SENSE AMPLIFIER
- Publication number 20160240231
- Publication date Aug 18, 2016
- Apple Inc.
- Ramesh Arvapalli
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND CIRCUITS FOR LOW LATENCY INITIALIZATION OF STATIC RANDOM...
- Publication number 20160071574
- Publication date Mar 10, 2016
- Apple Inc.
- Greg M. Hess
- G11 - INFORMATION STORAGE
Information Patent Application
SELECTABLE PHASE OR CYCLE JITTER DETECTOR
- Publication number 20160062388
- Publication date Mar 3, 2016
- Apple Inc.
- Greg M. Hess
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE VOLTAGE REDUCTION FOR REGISTER FILE
- Publication number 20150348600
- Publication date Dec 3, 2015
- Apple Inc.
- Ajay Kumar Bhatia
- G11 - INFORMATION STORAGE
Information Patent Application
Contention Prevention for Sequenced Power Up of Electronic Systems
- Publication number 20150089250
- Publication date Mar 26, 2015
- Apple Inc.
- Greg M. Hess
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS TO SUPPRESS CONCURRENT READ AND WRITE WORD LINE ACCESS OF...
- Publication number 20140177346
- Publication date Jun 26, 2014
- Apple Inc.
- Hitesh Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
ZERO KEEPER CIRCUIT WITH FULL DESIGN-FOR-TEST COVERAGE
- Publication number 20140177354
- Publication date Jun 26, 2014
- Apple Inc.
- Hitesh K. Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
SELECTABLE PHASE OR CYCLE JITTER DETECTOR
- Publication number 20140129868
- Publication date May 8, 2014
- Apple Inc.
- Greg M. Hess
- G01 - MEASURING TESTING
Information Patent Application
REGISTER FILE WRITE RING OSCILLATOR
- Publication number 20140129884
- Publication date May 8, 2014
- Apple Inc.
- Greg M. Hess
- G11 - INFORMATION STORAGE
Information Patent Application
SENSE AMPLIFIER SOFT-FAIL DETECTION CIRCUIT
- Publication number 20140126312
- Publication date May 8, 2014
- Apple Inc.
- Greg M. Hess
- G11 - INFORMATION STORAGE
Information Patent Application
Low Voltage Register File Cell Structure
- Publication number 20140112429
- Publication date Apr 24, 2014
- Apple Inc.
- Ajay Bhatia
- G11 - INFORMATION STORAGE
Information Patent Application
Dynamic Level Shifter Circuit and Ring Oscillator Using the Same
- Publication number 20130335152
- Publication date Dec 19, 2013
- James E. Burnette
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Multiplexer with Level Shifter
- Publication number 20130154712
- Publication date Jun 20, 2013
- Greg M. Hess
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
EFFICIENT HANDLING OF MISALIGNED LOADS AND STORES
- Publication number 20130013862
- Publication date Jan 10, 2013
- Hari S. Kannan
- A61 - MEDICAL OR VETERINARY SCIENCE HYGIENE
Information Patent Application
Method and Apparatus for Power Domain Isolation during Power Down
- Publication number 20120275236
- Publication date Nov 1, 2012
- Greg M. Hess
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Leakage and NBTI Reduction Technique for Memory
- Publication number 20120257469
- Publication date Oct 11, 2012
- Brian J. Campbell
- G11 - INFORMATION STORAGE
Information Patent Application
Passgate for Dynamic Circuitry
- Publication number 20120075945
- Publication date Mar 29, 2012
- Greg M. Hess
- G11 - INFORMATION STORAGE
Information Patent Application
Level-Shifting Latch
- Publication number 20120044009
- Publication date Feb 23, 2012
- Greg M. Hess
- H03 - BASIC ELECTRONIC CIRCUITRY

Greg M. Hess

Person

Patents Grantslast 30 patents

System control using sparse data

System control using sparse data

Efficient retention flop utilizing different voltage domain

System control using sparse data

Efficient retention flop utilizing different voltage domain

Power switch multiplexer with configurable overlap

Supply tracking delay element in multiple power domain designs

System control using sparse data

Low leakage power switch

Pulsed sub-VDD precharging of a bit line

Global bit line pre-charging and data latching in multi-banked memo...

Power grid segmentation for memory arrays

Shared gate fed sense amplifier

Selectable phase or cycle jitter detector

Configurable voltage reduction for register file

Method and circuits for low latency initialization of static random...

Dynamic global memory bit line usage as storage node

Register file write ring oscillator

Selectable phase or cycle jitter detector

Efficient handling of misaligned loads and stores

Apparatus to suppress concurrent read and write word line access of...

Sense amplifier soft-fail detection circuit

Dynamic level shifter circuit and ring oscillator using the same

Zero keeper circuit with full design-for-test coverage

Method and apparatus for power domain isolation during power down

Multiplexer with level shifter

Level shifter with embedded logic and low minimum voltage

Leakage and NBTI reduction technique for memory

Leakage and NBTI reduction technique for memory

Passgate for dynamic circuitry

Patents Applicationslast 30 patents

System Control Using Sparse Data

System Control Using Sparse Data

System Control Using Sparse Data

Memory Bit Cell for In-Memory Computation

Efficient Retention Flop Utilizing Different Voltage Domain

Power Switch Multiplexer with Configurable Overlap

System Control Using Sparse Data

PULSED SUB-VDD PRECHARGING OF A BIT LINE

LOW LEAKAGE POWER SWITCH

SYSTEM CONTROL USING SPARSE DATA

SUPPLY TRACKING DELAY ELEMENT IN MULTIPLE POWER DOMAIN DESIGNS

GLOBAL BIT LINE PRE-CHARGING AND DATA LATCHING IN MULTI-BANKED MEMO...

SHARED GATE FED SENSE AMPLIFIER

METHOD AND CIRCUITS FOR LOW LATENCY INITIALIZATION OF STATIC RANDOM...

SELECTABLE PHASE OR CYCLE JITTER DETECTOR

CONFIGURABLE VOLTAGE REDUCTION FOR REGISTER FILE

Contention Prevention for Sequenced Power Up of Electronic Systems

APPARATUS TO SUPPRESS CONCURRENT READ AND WRITE WORD LINE ACCESS OF...

ZERO KEEPER CIRCUIT WITH FULL DESIGN-FOR-TEST COVERAGE

SELECTABLE PHASE OR CYCLE JITTER DETECTOR

REGISTER FILE WRITE RING OSCILLATOR

SENSE AMPLIFIER SOFT-FAIL DETECTION CIRCUIT

Low Voltage Register File Cell Structure

Dynamic Level Shifter Circuit and Ring Oscillator Using the Same

Multiplexer with Level Shifter

EFFICIENT HANDLING OF MISALIGNED LOADS AND STORES

Method and Apparatus for Power Domain Isolation during Power Down

Leakage and NBTI Reduction Technique for Memory

Passgate for Dynamic Circuitry

Level-Shifting Latch