Gregory Boyd SHINN

Person

Dallas, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Thin film resistor with punch-through vias
- Patent number 11,848,268
- Issue date Dec 19, 2023
- Texas Instruments Incorporated
- Dhishan Kande
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
IC with thin film resistor with metal walls
- Patent number 11,424,183
- Issue date Aug 23, 2022
- Texas Instruments Incorporated
- Qi-Zhong Hong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin film resistor with punch-through vias
- Patent number 11,101,212
- Issue date Aug 24, 2021
- Texas Instruments Incorporated
- Dhishan Kande
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Customizing circuit layout design rules for fabrication facilities
- Patent number 10,956,646
- Issue date Mar 23, 2021
- Texas Instruments Incorporated
- Tae S. Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
IC with thin film resistor with metal walls
- Patent number 10,784,193
- Issue date Sep 22, 2020
- Texas Instruments Incorporated
- Qi-Zhong Hong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin film resistor with punch-through vias
- Patent number 10,354,951
- Issue date Jul 16, 2019
- Texas Instruments Incorporated
- Dhishan Kande
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dummy contacts to mitigate plasma charging damage to gate dielectrics
- Patent number 10,249,621
- Issue date Apr 2, 2019
- Texas Instruments Incorporated
- Mark Robert Visokay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Replacement of scribeline padframe with saw-friendly design
- Patent number 8,309,957
- Issue date Nov 13, 2012
- Texas Instruments Incorporated
- Basab Chatterjee
- G01 - MEASURING TESTING
Information Patent Grant
Method for leakage reduction in fabrication of high-density FRAM ar...
- Patent number 8,093,070
- Issue date Jan 10, 2012
- Texas Instruments Incorporated
- Francis Gabriel Celii
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integration scheme for using silicided dual work function metal gates
- Patent number 7,183,187
- Issue date Feb 27, 2007
- Texas Instruments Incorporated
- Jiong-Ping Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for reworking metal layers on integrated circuit bond pads
- Patent number 6,821,791
- Issue date Nov 23, 2004
- Texas Instruments Incorporated
- Roger J. Stierman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shallow trench isolation planarization using self aligned isotropic...
- Patent number 6,686,283
- Issue date Feb 3, 2004
- Texas Instruments Incorporated
- Shawn T. Walsh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for reworking metal layers on integrated circuit bond pads
- Patent number 6,534,327
- Issue date Mar 18, 2003
- Texas Instruments Incorporated
- Roger J. Stierman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-planarizing low-temperature doped-silicate-glass process capab...
- Patent number 6,268,297
- Issue date Jul 31, 2001
- Texas Instruments Incorporated
- Somnath S. Nag
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Post-chemical mechanical planarization clean-up process using post-...
- Patent number 5,996,594
- Issue date Dec 7, 1999
- Texas Instruments Incorporated
- Sudipto Ranendra Roy
- B08 - CLEANING
Information Patent Grant
Controlling process modules using site models and monitor wafer con...
- Patent number 5,751,582
- Issue date May 12, 1998
- Texas Instruments Incorporated
- Sharad Saxena
- G05 - CONTROLLING REGULATING

Patents Applicationslast 30 patents

Information Patent Application
THIN FILM RESISTOR MISMATCH IMPROVEMENT USING A SELF-ALIGNED DOUBLE...
- Publication number 20240113156
- Publication date Apr 4, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Scott William JESSEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIELECTRIC SILICON NITRIDE BARRIER DEPOSITION PROCESS FOR IMPROVED...
- Publication number 20230386907
- Publication date Nov 30, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Qi-Zhong Hong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THIN FILM RESISTOR WITH PUNCH-THROUGH VIAS
- Publication number 20210343642
- Publication date Nov 4, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Dhishan Kande
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IC WITH THIN FILM RESISTOR WITH METAL WALLS
- Publication number 20200381358
- Publication date Dec 3, 2020
- TEXAS INSTRUMENTS INCORPORATED
- QI-ZHONG HONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IC WITH THIN FILM RESISTOR WITH METAL WALLS
- Publication number 20200035598
- Publication date Jan 30, 2020
- TEXAS INSTRUMENTS INCORPORATED
- QI-ZHONG HONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THIN FILM RESISTOR WITH PUNCH-THROUGH VIAS
- Publication number 20190295948
- Publication date Sep 26, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Dhishan Kande
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THIN FILM RESISTOR WITH PUNCH-THROUGH VIAS
- Publication number 20190221516
- Publication date Jul 18, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Dhishan Kande
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CUSTOMIZING CIRCUIT LAYOUT DESIGN RULES FOR FABRICATION FACILITIES
- Publication number 20190114383
- Publication date Apr 18, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Tae S. KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DUMMY CONTACTS TO MITIGATE PLASMA CHARGING DAMAGE TO GATE DIELECTRICS
- Publication number 20180175023
- Publication date Jun 21, 2018
- TEXAS INSTRUMENTS INCORPORATED
- MARK ROBERT VISOKAY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Replacement of Scribeline Padframe with Saw-Friendly Design
- Publication number 20100264413
- Publication date Oct 21, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Basab CHATTERJEE
- G01 - MEASURING TESTING
Information Patent Application
Method for leakage reduction in fabrication of high-density FRAM ar...
- Publication number 20080081380
- Publication date Apr 3, 2008
- Texas Instruments Inc.
- Francis Gabriel Celii
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMP CLEAN PROCESS FOR HIGH PERFORMANCE COPPER/LOW-K DEVICES
- Publication number 20070181532
- Publication date Aug 9, 2007
- Texas Instruments, Incorporated
- Mona M. EISSA
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
Integration scheme for using silicided dual work function metal gates
- Publication number 20050260841
- Publication date Nov 24, 2005
- Texas Instruments, Incorporated
- Jiong-Ping Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Treatment of dies prior to nickel silicide formation
- Publication number 20050247675
- Publication date Nov 10, 2005
- TEXAS INSTRUMENTS INCORPORATED
- Mona M. Eissa
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
Surfactants for post-chemical mechanical polishing storage and clea...
- Publication number 20040074518
- Publication date Apr 22, 2004
- TEXAS INSTRUMENTS INCORPORATED
- Vincent C. Korthuis
- C09 - DYES PAINTS POLISHES NATURAL RESINS ADHESIVES MISCELLANEOUS COMPOSITION...
Information Patent Application
Surfactants for chemical mechanical polishing
- Publication number 20040074517
- Publication date Apr 22, 2004
- TEXAS INSTRUMENTS INCORPORATED
- Vincent C. Korthuis
- B24 - GRINDING POLISHING
Information Patent Application
Method for reworking metal layers on integrated circuit bond pads
- Publication number 20030153107
- Publication date Aug 14, 2003
- Roger J. Stierman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for unpatterned resist etch back of shallow trench isolation...
- Publication number 20020072237
- Publication date Jun 13, 2002
- Christopher Mark Bowles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for reworking metal layers on integrated circuit bond pads
- Publication number 20010046721
- Publication date Nov 29, 2001
- Roger J. Stierman
- H01 - BASIC ELECTRIC ELEMENTS

Gregory Boyd SHINN

Person

Patents Grantslast 30 patents

Thin film resistor with punch-through vias

IC with thin film resistor with metal walls

Thin film resistor with punch-through vias

Customizing circuit layout design rules for fabrication facilities

IC with thin film resistor with metal walls

Thin film resistor with punch-through vias

Dummy contacts to mitigate plasma charging damage to gate dielectrics

Replacement of scribeline padframe with saw-friendly design

Method for leakage reduction in fabrication of high-density FRAM ar...

Integration scheme for using silicided dual work function metal gates

Method for reworking metal layers on integrated circuit bond pads

Shallow trench isolation planarization using self aligned isotropic...

Method for reworking metal layers on integrated circuit bond pads

Self-planarizing low-temperature doped-silicate-glass process capab...

Post-chemical mechanical planarization clean-up process using post-...

Controlling process modules using site models and monitor wafer con...

Patents Applicationslast 30 patents

THIN FILM RESISTOR MISMATCH IMPROVEMENT USING A SELF-ALIGNED DOUBLE...

DIELECTRIC SILICON NITRIDE BARRIER DEPOSITION PROCESS FOR IMPROVED...

THIN FILM RESISTOR WITH PUNCH-THROUGH VIAS

IC WITH THIN FILM RESISTOR WITH METAL WALLS

IC WITH THIN FILM RESISTOR WITH METAL WALLS

THIN FILM RESISTOR WITH PUNCH-THROUGH VIAS

THIN FILM RESISTOR WITH PUNCH-THROUGH VIAS

CUSTOMIZING CIRCUIT LAYOUT DESIGN RULES FOR FABRICATION FACILITIES

DUMMY CONTACTS TO MITIGATE PLASMA CHARGING DAMAGE TO GATE DIELECTRICS

Replacement of Scribeline Padframe with Saw-Friendly Design

Method for leakage reduction in fabrication of high-density FRAM ar...

CMP CLEAN PROCESS FOR HIGH PERFORMANCE COPPER/LOW-K DEVICES

Integration scheme for using silicided dual work function metal gates

Treatment of dies prior to nickel silicide formation

Surfactants for post-chemical mechanical polishing storage and clea...

Surfactants for chemical mechanical polishing

Method for reworking metal layers on integrated circuit bond pads

Method for unpatterned resist etch back of shallow trench isolation...

Method for reworking metal layers on integrated circuit bond pads