Gregory S. Mathews

Person

Saratoga, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory bank hotspotting
- Patent number 12,118,249
- Issue date Oct 15, 2024
- Apple Inc.
- Gregory S. Mathews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Temperature-based bandwidth compensation for memory traffic
- Patent number 12,093,541
- Issue date Sep 17, 2024
- Apple Inc.
- Gregory S. Mathews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory error tracking and logging
- Patent number 11,934,265
- Issue date Mar 19, 2024
- Apple Inc.
- Farid Nemati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device bandwidth optimization
- Patent number 11,914,532
- Issue date Feb 27, 2024
- Apple Inc.
- Gregory S. Mathews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-activation techniques for partial write operations
- Patent number 11,847,348
- Issue date Dec 19, 2023
- Apple Inc.
- Shane J. Keil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data corruption tracking for memory reliability
- Patent number 11,829,242
- Issue date Nov 28, 2023
- Apple Inc.
- Farid Nemati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Communication channels with both shared and independent resources
- Patent number 11,824,795
- Issue date Nov 21, 2023
- Rohit K. Gupta
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Ordering memory requests based on access efficiency
- Patent number 11,403,037
- Issue date Aug 2, 2022
- Apple Inc.
- Shane J. Keil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write/read turn techniques based on latency tolerance
- Patent number 11,221,798
- Issue date Jan 11, 2022
- Apple Inc.
- Gregory S. Mathews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory access scheduling using category arbitration
- Patent number 10,901,617
- Issue date Jan 26, 2021
- Apple Inc.
- Gregory S. Mathews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory access quality-of-service reallocation
- Patent number 10,838,884
- Issue date Nov 17, 2020
- Apple Inc.
- Thejasvi Magudilu Vijavaraj
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory access scheduling using a linked list
- Patent number 10,817,219
- Issue date Oct 27, 2020
- Apple Inc.
- Lakshmi Narasimha Murthy Nukala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory request management system
- Patent number 10,783,104
- Issue date Sep 22, 2020
- Apple Inc.
- Gregory S. Mathews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for performing per-bank memory refresh
- Patent number 10,777,252
- Issue date Sep 15, 2020
- Apple Inc.
- Peter Fu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ordering memory requests based on access efficiency
- Patent number 10,678,478
- Issue date Jun 9, 2020
- Apple Inc.
- Shane J. Keil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for communication link management in a credit-bas...
- Patent number 10,621,115
- Issue date Apr 14, 2020
- Apple Inc.
- Gregory S. Mathews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory arbitration techniques based on latency tolerance
- Patent number 10,545,701
- Issue date Jan 28, 2020
- Apple Inc.
- Gregory S. Mathews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory request management system
- Patent number 10,437,758
- Issue date Oct 8, 2019
- Apple Inc.
- Gregory S. Mathews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for dynamically switching memory performance st...
- Patent number 10,175,905
- Issue date Jan 8, 2019
- Apple Inc.
- Robert E. Jeter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Priority-biased exit queue arbitration with fairness
- Patent number 8,090,869
- Issue date Jan 3, 2012
- Alcatel Lucent
- Greg Mathews
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Testing and error recovery across multiple switching fabrics
- Patent number 7,876,693
- Issue date Jan 25, 2011
- Alcatel-Lucent USA Inc.
- Gregory S. Mathews
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Hierarchical rate limiting with proportional limiting
- Patent number 7,801,045
- Issue date Sep 21, 2010
- Alcatel Lucent
- Gregory S. Mathews
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Pointer allocation by prime numbers
- Patent number 7,733,888
- Issue date Jun 8, 2010
- Alcatel-Lucent USA Inc.
- Gregory S. Mathews
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Flow control in a distributed scalable, shared memory switching fab...
- Patent number 7,525,917
- Issue date Apr 28, 2009
- Acatel-Lucent USA Inc.
- Philip Ferolito
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Using reassembly queue sets for packet reassembly
- Patent number 7,394,822
- Issue date Jul 1, 2008
- Lucent Technologies Inc.
- Gregory S. Mathews
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Random early drop with per hop behavior biasing
- Patent number 7,349,336
- Issue date Mar 25, 2008
- Lucent Technologies Inc.
- Gregory Mathews
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit and method for protecting vector tags in high performance m...
- Patent number 7,315,920
- Issue date Jan 1, 2008
- Intel Corporation
- Nhon Quach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimal load balancing across multiple switching fabrics
- Patent number 7,242,691
- Issue date Jul 10, 2007
- Lucent Technologies Inc.
- Gregory S. Mathews
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit and method for protecting 1-hot and 2-hot vector tags in hi...
- Patent number 6,904,502
- Issue date Jun 7, 2005
- Intel Corporation
- Nhon Quach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit and method for protecting 1-hot and 2-hot vector tags in hi...
- Patent number 6,839,814
- Issue date Jan 4, 2005
- Intel Corporation
- Nhon Quach
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Memory Device Bandwidth Optimization
- Publication number 20240202146
- Publication date Jun 20, 2024
- Apple Inc.
- Gregory S. Mathews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Write Arbiter Circuit with Per-Rank Allocation Override Mode
- Publication number 20240094917
- Publication date Mar 21, 2024
- Apple Inc.
- Shane J. Keil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Read Arbiter Circuit with Dual Memory Rank Support
- Publication number 20240095194
- Publication date Mar 21, 2024
- Apple Inc.
- Shane J. Keil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Bank Hotspotting
- Publication number 20240061617
- Publication date Feb 22, 2024
- Apple Inc.
- Gregory S. Mathews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Decoding Status Flag Techniques for Memory Circuits
- Publication number 20230325274
- Publication date Oct 12, 2023
- Apple Inc.
- Farid Nemati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Error Tracking and Logging
- Publication number 20230305924
- Publication date Sep 28, 2023
- Apple Inc.
- Farid Nemati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data Corruption Tracking for Memory Reliability
- Publication number 20230251930
- Publication date Aug 10, 2023
- Apple Inc.
- Farid Nemati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Device Bandwidth Optimization
- Publication number 20230063772
- Publication date Mar 2, 2023
- Apple Inc.
- Gregory S. Mathews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Activation Techniques for Partial Write Operations
- Publication number 20230068494
- Publication date Mar 2, 2023
- Apple Inc.
- Shane J. Keil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Communication Channels with both Shared and Independent Resources
- Publication number 20230064187
- Publication date Mar 2, 2023
- Apple Inc.
- Rohit K. Gupta
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Memory Bank Hotspotting
- Publication number 20220357879
- Publication date Nov 10, 2022
- Apple Inc.
- Gregory S. Mathews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ORDERING MEMORY REQUESTS BASED ON ACCESS EFFICIENCY
- Publication number 20200301615
- Publication date Sep 24, 2020
- Apple Inc.
- Shane J. Keil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WRITE/READ TURN TECHNIQUES BASED ON LATENCY TOLERANCE
- Publication number 20200159463
- Publication date May 21, 2020
- Apple Inc.
- Gregory S. Mathews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY REQUEST MANAGEMENT SYSTEM
- Publication number 20200133905
- Publication date Apr 30, 2020
- Apple Inc.
- Gregory S. Mathews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY ACCESS SCHEDULING USING CATEGORY ARBITRATION
- Publication number 20200081622
- Publication date Mar 12, 2020
- Apple Inc.
- Gregory S. Mathews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY ACCESS SCHEDULING USING A LINKED LIST
- Publication number 20200081652
- Publication date Mar 12, 2020
- Apple Inc.
- Lakshmi Narasimha Murthy Nukala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ORDERING MEMORY REQUESTS BASED ON ACCESS EFFICIENCY
- Publication number 20200065028
- Publication date Feb 27, 2020
- Apple Inc.
- Shane J. Keil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Performing Per-Bank Memory Refresh
- Publication number 20200066328
- Publication date Feb 27, 2020
- Apple Inc.
- Peter Fu
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ARBITRATION TECHNIQUES BASED ON LATENCY TOLERANCE
- Publication number 20200057579
- Publication date Feb 20, 2020
- Apple Inc.
- Gregory S. Mathews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Communication Link Management in a Credit-Bas...
- Publication number 20200004700
- Publication date Jan 2, 2020
- Apple Inc.
- Gregory S. Mathews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR DYNAMICALLY SWITCHING MEMORY PERFORMANCE ST...
- Publication number 20180074743
- Publication date Mar 15, 2018
- Apple Inc.
- Robert E. Jeter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHICAL RATE LIMITING WITH PROPORTIONAL LIMITING
- Publication number 20080316921
- Publication date Dec 25, 2008
- Gregory S. Mathews
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Circuit and method for protecting vector tags in high performance m...
- Publication number 20050120184
- Publication date Jun 2, 2005
- Intel Corporation
- Nhon Quach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit and method for protecting 1-hot and 2-hot vector tags in hi...
- Publication number 20040139280
- Publication date Jul 15, 2004
- Intel Corporation
- Nhon T. Quach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit and method for protecting 1-hot and 2-hot vector tags in hi...
- Publication number 20040078529
- Publication date Apr 22, 2004
- Intel Corporation
- Nhon T. Quach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Testing and error recovery across multiple switching fabrics
- Publication number 20040037277
- Publication date Feb 26, 2004
- Gregory S. Mathews
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Pointer allocation by prime numbers
- Publication number 20030235189
- Publication date Dec 25, 2003
- Gregory S. Mathews
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Using reassembly queue sets for packet reassembly
- Publication number 20030223458
- Publication date Dec 4, 2003
- Gregory S. Mathews
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Flow control in a distributed scalable, shared memory switching fab...
- Publication number 20030223448
- Publication date Dec 4, 2003
- Philip Ferolito
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Random early drop with per hop behavior biasing
- Publication number 20030223362
- Publication date Dec 4, 2003
- Gregory Mathews
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Gregory S. Mathews

Person

Patents Grantslast 30 patents

Memory bank hotspotting

Temperature-based bandwidth compensation for memory traffic

Memory error tracking and logging

Memory device bandwidth optimization

Multi-activation techniques for partial write operations

Data corruption tracking for memory reliability

Communication channels with both shared and independent resources

Ordering memory requests based on access efficiency

Write/read turn techniques based on latency tolerance

Memory access scheduling using category arbitration

Memory access quality-of-service reallocation

Memory access scheduling using a linked list

Memory request management system

System and method for performing per-bank memory refresh

Ordering memory requests based on access efficiency

System and method for communication link management in a credit-bas...

Memory arbitration techniques based on latency tolerance

Memory request management system

Systems and methods for dynamically switching memory performance st...

Priority-biased exit queue arbitration with fairness

Testing and error recovery across multiple switching fabrics

Hierarchical rate limiting with proportional limiting

Pointer allocation by prime numbers

Flow control in a distributed scalable, shared memory switching fab...

Using reassembly queue sets for packet reassembly

Random early drop with per hop behavior biasing

Circuit and method for protecting vector tags in high performance m...

Optimal load balancing across multiple switching fabrics

Circuit and method for protecting 1-hot and 2-hot vector tags in hi...

Circuit and method for protecting 1-hot and 2-hot vector tags in hi...

Patents Applicationslast 30 patents

Memory Device Bandwidth Optimization

Write Arbiter Circuit with Per-Rank Allocation Override Mode

Read Arbiter Circuit with Dual Memory Rank Support

Memory Bank Hotspotting

Decoding Status Flag Techniques for Memory Circuits

Memory Error Tracking and Logging

Data Corruption Tracking for Memory Reliability

Memory Device Bandwidth Optimization

Multi-Activation Techniques for Partial Write Operations

Communication Channels with both Shared and Independent Resources

Memory Bank Hotspotting

ORDERING MEMORY REQUESTS BASED ON ACCESS EFFICIENCY

WRITE/READ TURN TECHNIQUES BASED ON LATENCY TOLERANCE

MEMORY REQUEST MANAGEMENT SYSTEM

MEMORY ACCESS SCHEDULING USING CATEGORY ARBITRATION

MEMORY ACCESS SCHEDULING USING A LINKED LIST

ORDERING MEMORY REQUESTS BASED ON ACCESS EFFICIENCY

System and Method for Performing Per-Bank Memory Refresh

MEMORY ARBITRATION TECHNIQUES BASED ON LATENCY TOLERANCE

System and Method for Communication Link Management in a Credit-Bas...

SYSTEMS AND METHODS FOR DYNAMICALLY SWITCHING MEMORY PERFORMANCE ST...

HIERARCHICAL RATE LIMITING WITH PROPORTIONAL LIMITING

Circuit and method for protecting vector tags in high performance m...

Circuit and method for protecting 1-hot and 2-hot vector tags in hi...

Circuit and method for protecting 1-hot and 2-hot vector tags in hi...

Testing and error recovery across multiple switching fabrics

Pointer allocation by prime numbers

Using reassembly queue sets for packet reassembly

Flow control in a distributed scalable, shared memory switching fab...

Random early drop with per hop behavior biasing