Gregory S. Snider

Person

People

Patents Grantslast 30 patents

Information Patent Grant
Piecewise smooth regularization of data
- Patent number 10,366,474
- Issue date Jul 30, 2019
- Hewlett Packard Enterprise Development LP
- Gregory Stuart Snider
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for modeling binary synapses
- Patent number 9,342,780
- Issue date May 17, 2016
- Hewlett Packard Enterprise Development LP
- Gregory Stuart Snider
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memristive adaptive resonance networks
- Patent number 8,812,418
- Issue date Aug 19, 2014
- Hewlett-Packard Development Company, L.P.
- Gregory S. Snider
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Three-dimensional integrated circuit
- Patent number 8,780,601
- Issue date Jul 15, 2014
- Hewlett-Packard Development Company, L.P.
- Gregory Stuart Snider
- G11 - INFORMATION STORAGE
Information Patent Grant
Refreshing memristive systems
- Patent number 8,675,391
- Issue date Mar 18, 2014
- Hewlett-Packard Development Company, L.P.
- Gregory Stuart Snider
- G11 - INFORMATION STORAGE
Information Patent Grant
Capacitive crossbar arrays
- Patent number 8,605,488
- Issue date Dec 10, 2013
- Hewlett-Packard Development Company, L.P.
- Dmitri Borisovich Strukov
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile data-storage latch
- Patent number 8,542,522
- Issue date Sep 24, 2013
- Hewlett-Packard Development Company, L.P.
- Gregory Stuart Snider
- G11 - INFORMATION STORAGE
Information Patent Grant
Hybrid microscale-nanoscale neuromorphic integrated circuit
- Patent number 8,332,340
- Issue date Dec 11, 2012
- Hewlett-Packard Development Company, L.P.
- Gregory S. Snider
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for implementing logic gates with spintronic de...
- Patent number 8,143,682
- Issue date Mar 27, 2012
- Hewlett-Packard Development Company, L.P.
- Alexandre M. Bratkovski
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Configurable molecular switch array
- Patent number 8,004,876
- Issue date Aug 23, 2011
- Hewlett-Packard Development Company, L.P.
- Gregory S. Snider
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Computational nodes and computational-node networks that include dy...
- Patent number 7,958,071
- Issue date Jun 7, 2011
- Hewlett-Packard Development Company, L.P.
- Gregory S. Snider
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using readily available driver and application source code with a s...
- Patent number 7,900,187
- Issue date Mar 1, 2011
- Robert Zeidman
- Robert M. Zeidman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mixed-scale electronic interface
- Patent number 7,833,842
- Issue date Nov 16, 2010
- Hewlett-Packard Development Company, L.P.
- R. Stanley Williams
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Three-dimensional crossbar array systems and methods for writing in...
- Patent number 7,763,978
- Issue date Jul 27, 2010
- Hewlett-Packard Development Company, L.P.
- Wei Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Compute clusters employing photonic interconnections for transmitti...
- Patent number 7,720,377
- Issue date May 18, 2010
- Hewlett-Packard Development Company, L.P.
- Gregory S. Snider
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mixed-scale electronic interface
- Patent number 7,692,215
- Issue date Apr 6, 2010
- Hewlett-Packard Development Company, L.P.
- R. Stanley Williams
- G11 - INFORMATION STORAGE
Information Patent Grant
Nanoscale shift register and signal demultiplexing using microscale...
- Patent number 7,652,911
- Issue date Jan 26, 2010
- Hewlett-Packard Development Company, L.P.
- Gregory S. Snider
- G11 - INFORMATION STORAGE
Information Patent Grant
FPGA architecture at conventional and submicron scales
- Patent number 7,609,089
- Issue date Oct 27, 2009
- Hewlett-Packard Development Company, L.P.
- Gregory S. Snider
- G11 - INFORMATION STORAGE
Information Patent Grant
Mixed-scale electronic interface
- Patent number 7,544,977
- Issue date Jun 9, 2009
- Hewlett-Packard Development Company, L.P.
- Gregory S. Snider
- G11 - INFORMATION STORAGE
Information Patent Grant
Nanowire crossbar implementations of logic gates using configurable...
- Patent number 7,530,032
- Issue date May 5, 2009
- Hewlett-Packard Development Company, L.P.
- Gregory S. Snider
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nanoscale shift register and signal demultiplexing using microscale...
- Patent number 7,525,833
- Issue date Apr 28, 2009
- Hewlett-Packard Development Company, L.P.
- Gregory S. Snider
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for fabricating nanoscale features
- Patent number 7,517,794
- Issue date Apr 14, 2009
- Hewlett-Packard Development Company, L.P.
- Gregory S. Snider
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Processor and programmable logic computing arrangement
- Patent number 7,444,495
- Issue date Oct 28, 2008
- Hewlett-Packard Development Company, L.P.
- Gregory S. Snider
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Nanoscale electronic latch
- Patent number 7,436,209
- Issue date Oct 14, 2008
- Hewlett-Packard Development Company, L.P.
- Gregory S. Snider
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FPGA architecture at conventional and submicron scales
- Patent number 7,405,462
- Issue date Jul 29, 2008
- Hewlett-Packard Development Company, L.P.
- Gregory S. Snider
- G11 - INFORMATION STORAGE
Information Patent Grant
Antisymmetric nanowire crossbars
- Patent number 7,358,614
- Issue date Apr 15, 2008
- Hewlett-Packard Development Company, L.P.
- Gregory S. Snider
- G11 - INFORMATION STORAGE
Information Patent Grant
Molecular-junction-nanowire-crossbar-based neural network
- Patent number 7,359,888
- Issue date Apr 15, 2008
- Hewlett-Packard Development Company, L.P.
- Greg Snider
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tunneling-resistor-junction-based microscale/nanoscale demultiplexe...
- Patent number 7,319,416
- Issue date Jan 15, 2008
- Hewlett-Packard Development Company, L.P.
- Warren Robinett
- G11 - INFORMATION STORAGE
Information Patent Grant
Interconnectable nanoscale computational stages
- Patent number 7,307,448
- Issue date Dec 11, 2007
- Hewlett-Packard Development Company, L.P.
- Gregory S. Snider
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Factored nanoscale multiplexer/demultiplexer circuit for interfacin...
- Patent number 7,292,498
- Issue date Nov 6, 2007
- Hewlett-Packard Development Company, L.P.
- Gregory S. Snider
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
PIECEWISE SMOOTH REGULARIZATION OF DATA
- Publication number 20170148143
- Publication date May 25, 2017
- Gregory Stuart Snider
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPILATION SYSTEM FOR EXECUTABLE OBJECTS
- Publication number 20150212862
- Publication date Jul 30, 2015
- Gregory Stuart Snider
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR MODELING BINARY SYNAPSES
- Publication number 20130132314
- Publication date May 23, 2013
- Hewlett-Packard Development Company, L.P.
- Gregory Stuart Snider
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THREE-DIMENSIONAL INTEGRATED CIRCUIT
- Publication number 20130121054
- Publication date May 16, 2013
- Gregory Stuart Snider
- B82 - NANO-TECHNOLOGY
Information Patent Application
REFRESHING MEMRISTIVE SYSTEMS
- Publication number 20130028004
- Publication date Jan 31, 2013
- Gregory Stuart Snider
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE DATA-STORAGE LATCH
- Publication number 20120014169
- Publication date Jan 19, 2012
- Gregory Stuart Snider
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Capacitive Crossbar Arrays
- Publication number 20120014170
- Publication date Jan 19, 2012
- Hewlet- Packard Developement Company L.P.
- Dmitri Borisovich Strukov
- G11 - INFORMATION STORAGE
Information Patent Application
Memristive Adaptive Resonance Networks
- Publication number 20120016829
- Publication date Jan 19, 2012
- Hewlett-Packard Development Company, L.P.
- Gregory S. Snider
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Neuromorphic Circuit
- Publication number 20110004579
- Publication date Jan 6, 2011
- Greg Snider
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID MICROSCALE-NANOSCALE NEUROMORPHIC INTEGRATED CIRCUIT
- Publication number 20100277232
- Publication date Nov 4, 2010
- Gregory S. Snider
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MIXED-SCALE ELECTRONIC INTERFACE
- Publication number 20100081238
- Publication date Apr 1, 2010
- R. Stanley Williams
- G11 - INFORMATION STORAGE
Information Patent Application
Nanoscale Shift Register And Signal Demultiplexing Using Microscale...
- Publication number 20090196090
- Publication date Aug 6, 2009
- Gregory S. Snider
- G11 - INFORMATION STORAGE
Information Patent Application
Nanowire Crossbar Implementations of logic Gates using configurable...
- Publication number 20090189642
- Publication date Jul 30, 2009
- Gregory S. Snider
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Computational nodes and computational-node networks that include dy...
- Publication number 20080258767
- Publication date Oct 23, 2008
- Gregory S. Snider
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FPGA architecture at conventonal and submicron scales
- Publication number 20080238478
- Publication date Oct 2, 2008
- Gregory S. Snider
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Three-dimensional crossbar array systems and methods for writing in...
- Publication number 20080237886
- Publication date Oct 2, 2008
- Wei Wu
- G11 - INFORMATION STORAGE
Information Patent Application
Methods and systems for implementing logic gates with spintronic de...
- Publication number 20080100345
- Publication date May 1, 2008
- Alexandre M. Bratkovski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method for fabricating nanoscale features
- Publication number 20070238291
- Publication date Oct 11, 2007
- Gregory S. Snider
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Mixed-scale electronic interface
- Publication number 20070205483
- Publication date Sep 6, 2007
- R. Stanley Williams
- G11 - INFORMATION STORAGE
Information Patent Application
TUNNELING-RESISTOR-JUNCTION-BASED MICROSCALE/NANOSCALE DEMULTIPLEXE...
- Publication number 20070176801
- Publication date Aug 2, 2007
- Warren Robinett
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Mixed-scale electronic interface
- Publication number 20070176168
- Publication date Aug 2, 2007
- Gregory S. Snider
- G11 - INFORMATION STORAGE
Information Patent Application
FPGA architecture at conventional and submicron scales
- Publication number 20070176630
- Publication date Aug 2, 2007
- Gregory S. Snider
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Compute clusters employing photonic interconnections for transmitti...
- Publication number 20070172235
- Publication date Jul 26, 2007
- Gregory S. Snider
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NANOSCALE LATCH-ARRAY PROCESSING ENGINES
- Publication number 20070109014
- Publication date May 17, 2007
- Gregory S. Snider
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Nanowire crossbar implementations of logic gates using configurable...
- Publication number 20070101308
- Publication date May 3, 2007
- Gregory S. Snider
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Nanoscale shift register and signal demultiplexing using microscale...
- Publication number 20070094756
- Publication date Apr 26, 2007
- Gregory S. Snider
- G11 - INFORMATION STORAGE
Information Patent Application
Enhanced nanowire-crossbar latch array
- Publication number 20060268598
- Publication date Nov 30, 2006
- Gregory S. Snider
- G11 - INFORMATION STORAGE
Information Patent Application
Interconnectable nanoscale computational stages
- Publication number 20060266999
- Publication date Nov 30, 2006
- Gregory S. Snider
- B82 - NANO-TECHNOLOGY
Information Patent Application
Factored nanoscale multiplexer/demultiplexer circuit for interfacin...
- Publication number 20060250878
- Publication date Nov 9, 2006
- Gregory S. Snider
- G11 - INFORMATION STORAGE
Information Patent Application
Using readily available driver and application source code with a s...
- Publication number 20060253832
- Publication date Nov 9, 2006
- Robert M. Zeidman
- G06 - COMPUTING CALCULATING COUNTING

Gregory S. Snider

Person

Patents Grantslast 30 patents

Piecewise smooth regularization of data

Systems and methods for modeling binary synapses

Memristive adaptive resonance networks

Three-dimensional integrated circuit

Refreshing memristive systems

Capacitive crossbar arrays

Non-volatile data-storage latch

Hybrid microscale-nanoscale neuromorphic integrated circuit

Methods and systems for implementing logic gates with spintronic de...

Configurable molecular switch array

Computational nodes and computational-node networks that include dy...

Using readily available driver and application source code with a s...

Mixed-scale electronic interface

Three-dimensional crossbar array systems and methods for writing in...

Compute clusters employing photonic interconnections for transmitti...

Mixed-scale electronic interface

Nanoscale shift register and signal demultiplexing using microscale...

FPGA architecture at conventional and submicron scales

Mixed-scale electronic interface

Nanowire crossbar implementations of logic gates using configurable...

Nanoscale shift register and signal demultiplexing using microscale...

Method for fabricating nanoscale features

Processor and programmable logic computing arrangement

Nanoscale electronic latch

FPGA architecture at conventional and submicron scales

Antisymmetric nanowire crossbars

Molecular-junction-nanowire-crossbar-based neural network

Tunneling-resistor-junction-based microscale/nanoscale demultiplexe...

Interconnectable nanoscale computational stages

Factored nanoscale multiplexer/demultiplexer circuit for interfacin...

Patents Applicationslast 30 patents

PIECEWISE SMOOTH REGULARIZATION OF DATA

COMPILATION SYSTEM FOR EXECUTABLE OBJECTS

SYSTEMS AND METHODS FOR MODELING BINARY SYNAPSES

THREE-DIMENSIONAL INTEGRATED CIRCUIT

REFRESHING MEMRISTIVE SYSTEMS

NON-VOLATILE DATA-STORAGE LATCH

Capacitive Crossbar Arrays

Memristive Adaptive Resonance Networks

Neuromorphic Circuit

HYBRID MICROSCALE-NANOSCALE NEUROMORPHIC INTEGRATED CIRCUIT

MIXED-SCALE ELECTRONIC INTERFACE

Nanoscale Shift Register And Signal Demultiplexing Using Microscale...

Nanowire Crossbar Implementations of logic Gates using configurable...

Computational nodes and computational-node networks that include dy...

FPGA architecture at conventonal and submicron scales

Three-dimensional crossbar array systems and methods for writing in...

Methods and systems for implementing logic gates with spintronic de...

Method for fabricating nanoscale features

Mixed-scale electronic interface

TUNNELING-RESISTOR-JUNCTION-BASED MICROSCALE/NANOSCALE DEMULTIPLEXE...

Mixed-scale electronic interface

FPGA architecture at conventional and submicron scales

Compute clusters employing photonic interconnections for transmitti...

NANOSCALE LATCH-ARRAY PROCESSING ENGINES

Nanowire crossbar implementations of logic gates using configurable...

Nanoscale shift register and signal demultiplexing using microscale...

Enhanced nanowire-crossbar latch array

Interconnectable nanoscale computational stages

Factored nanoscale multiplexer/demultiplexer circuit for interfacin...

Using readily available driver and application source code with a s...