Gregory William Alexander

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Load reissuing using an alternate issue queue
- Patent number 12,099,845
- Issue date Sep 24, 2024
- International Business Machines Corporation
- Jonathan Ting Hsieh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decentralized hot cache line tracking fairness mechanism
- Patent number 12,038,841
- Issue date Jul 16, 2024
- International Business Machines Corporation
- Tu-An T. Nguyen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Invalidity protection for shared cache lines
- Patent number 11,989,128
- Issue date May 21, 2024
- International Business Machines Corporation
- Winston Herring
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shadow pointer directory in an inclusive hierarchical cache
- Patent number 11,977,486
- Issue date May 7, 2024
- International Business Machines Corporation
- Ashraf ElSharif
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hot line fairness mechanism favoring software forward progress
- Patent number 11,907,125
- Issue date Feb 20, 2024
- International Business Machines Corporation
- Gregory William Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Final cache directory state indication
- Patent number 11,907,132
- Issue date Feb 20, 2024
- International Business Machines Corporation
- Jason D Kohl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache management using cache scope designation
- Patent number 11,880,304
- Issue date Jan 23, 2024
- International Business Machines Corporation
- Taylor J Pritchard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Preemptive tracking of remote requests for decentralized hot cache...
- Patent number 11,853,212
- Issue date Dec 26, 2023
- International Business Machines Corporation
- Tu-An T. Nguyen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Preventing extraneous messages when exiting core recovery
- Patent number 11,782,777
- Issue date Oct 10, 2023
- International Business Machines Corporation
- Gregory William Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiprocessor system cache management with non-authority designation
- Patent number 11,782,836
- Issue date Oct 10, 2023
- International Business Machines Corporation
- Jason D Kohl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Special tracking pool enhancement for core local cache address inva...
- Patent number 11,748,266
- Issue date Sep 5, 2023
- International Business Machines Corporation
- Deanna Postles Dunn Berger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Lateral persistence directory states
- Patent number 11,620,231
- Issue date Apr 4, 2023
- International Business Machines Corporation
- Ram Sai Manoj Bamdhamravuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple copy scoping bits for cache memory
- Patent number 11,487,672
- Issue date Nov 1, 2022
- International Business Machines Corporation
- Chunggeon Rhee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Slice-based allocation history buffer
- Patent number 11,360,775
- Issue date Jun 14, 2022
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction scheduling during execution in a processor
- Patent number 11,256,511
- Issue date Feb 22, 2022
- International Business Machines Corporation
- Cedric Lichtenau
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Identifying microarchitectural security vulnerabilities using simul...
- Patent number 11,205,005
- Issue date Dec 21, 2021
- International Business Machines Corporation
- Matthew Michael Garcia Pardini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Post completion execution in an out-of-order processor design
- Patent number 11,182,168
- Issue date Nov 23, 2021
- International Business Machines Corporation
- Avery Francois
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Comparing load instruction address fields to store instruction addr...
- Patent number 11,175,923
- Issue date Nov 16, 2021
- International Business Machines Corporation
- Gregory W. Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Store hit multiple load side register for preventing a subsequent s...
- Patent number 11,144,321
- Issue date Oct 12, 2021
- International Business Machines Corporation
- Yair Fried
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write power optimization for hardware employing pipe-based duplicat...
- Patent number 11,144,367
- Issue date Oct 12, 2021
- International Business Machines Corporation
- Richard Joseph Branciforte
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Store instruction to store instruction dependency
- Patent number 11,113,055
- Issue date Sep 7, 2021
- International Business Machines Corporation
- Edward Malley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adjusting thread balancing in response to disruptive complex instru...
- Patent number 11,068,303
- Issue date Jul 20, 2021
- International Business Machines Corporation
- Avery Francois
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Offset-based mechanism for storage in global completion tables
- Patent number 10,977,041
- Issue date Apr 13, 2021
- International Business Machines Corporation
- Avery Francois
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache miss thread balancing
- Patent number 10,963,380
- Issue date Mar 30, 2021
- International Business Machines Corporation
- Gregory W. Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Accounting for multiple pipeline depths in processor instrumentation
- Patent number 10,963,259
- Issue date Mar 30, 2021
- International Business Machines Corporation
- Avery Francois
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Post completion execution in an out-of-order processor design
- Patent number 10,956,168
- Issue date Mar 23, 2021
- International Business Machines Corporation
- Avery Francois
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Making precise operand-store-compare predictions to avoid false dep...
- Patent number 10,929,142
- Issue date Feb 23, 2021
- International Business Machines Corporation
- Gregory William Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Slice-based allocation history buffer
- Patent number 10,884,752
- Issue date Jan 5, 2021
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Infinite processor thread balancing
- Patent number 10,884,754
- Issue date Jan 5, 2021
- International Business Machines Corporation
- Gregory W. Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Imprecise register dependency tracking
- Patent number 10,802,830
- Issue date Oct 13, 2020
- International Business Machines Corporation
- Jonathan Hsieh
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DEADLOCK AND HANG AVOIDANCE IN A LARGE DISTRIBUTED COMPUTER SYSTEM
- Publication number 20240176636
- Publication date May 30, 2024
- International Business Machines Corporation
- Matthias KLEIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR CROSS-CORE CACHE LINE CONTENTION MANAGEMENT
- Publication number 20240104021
- Publication date Mar 28, 2024
- International Business Machines Corporation
- Michael Joseph Cadigan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CROSS-CORE INVALIDATION SNAPSHOT MANAGEMENT
- Publication number 20240070075
- Publication date Feb 29, 2024
- International Business Machines Corporation
- Richard Joseph Branciforte
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOAD REISSUING USING AN ALTERNATE ISSUE QUEUE
- Publication number 20230409331
- Publication date Dec 21, 2023
- International Business Machines Corporation
- Jonathan Ting Hsieh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE MANAGEMENT USING CACHE SCOPE DESIGNATION
- Publication number 20230385195
- Publication date Nov 30, 2023
- International Business Machines Corporation
- Taylor J. Pritchard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PREEMPTIVE TRACKING OF REMOTE REQUESTS FOR DECENTRALIZED HOT CACHE...
- Publication number 20230315629
- Publication date Oct 5, 2023
- International Business Machines Corporation
- Tu-An T. Nguyen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHADOW POINTER DIRECTORY IN AN INCLUSIVE HIERARCHICAL CACHE
- Publication number 20230315633
- Publication date Oct 5, 2023
- International Business Machines Corporation
- Ashraf ElSharif
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BIDIRECTIONAL RING-BASED INTERCONNECTION NETWORKS FOR MULTIPROCESSORS
- Publication number 20230318979
- Publication date Oct 5, 2023
- International Business Machines Corporation
- Avery Francois
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MULTIPROCESSOR SYSTEM CACHE MANAGEMENT WITH NON-AUTHORITY DESIGNATION
- Publication number 20230315636
- Publication date Oct 5, 2023
- International Business Machines Corporation
- Jason D. Kohl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HOT LINE FAIRNESS MECHANISM FAVORING SOFTWARE FORWARD PROGRESS
- Publication number 20230315637
- Publication date Oct 5, 2023
- International Business Machines Corporation
- Gregory William Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DECENTRALIZED HOT CACHE LINE TRACKING FAIRNESS MECHANISM
- Publication number 20230315638
- Publication date Oct 5, 2023
- International Business Machines Corporation
- Tu-An T. Nguyen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FINAL CACHE DIRECTORY STATE INDICATION
- Publication number 20230305966
- Publication date Sep 28, 2023
- International Business Machines Corporation
- Jason D. Kohl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPECIAL TRACKING POOL ENHANCEMENT FOR CORE LOCAL CACHE ADDRESS INVA...
- Publication number 20230281132
- Publication date Sep 7, 2023
- International Business Machines Corporation
- Deanna Postles Dunn Berger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LATERAL PERSISTENCE DIRECTORY STATES
- Publication number 20230054424
- Publication date Feb 23, 2023
- International Business Machines Corporation
- Ram Sai Manoj BAMDHAMRAVURI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POST COMPLETION EXECUTION IN AN OUT-OF-ORDER PROCESSOR DESIGN
- Publication number 20210109758
- Publication date Apr 15, 2021
- International Business Machines Corporation
- Avery Francois
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IDENTIFYING MICROARCHITECTURAL SECURITY VULNERABILITIES USING SIMUL...
- Publication number 20210089659
- Publication date Mar 25, 2021
- International Business Machines Corporation
- Matthew Michael Garcia Pardini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCOUNTING FOR MULTIPLE PIPELINE DEPTHS IN PROCESSOR INSTRUMENTATION
- Publication number 20200387378
- Publication date Dec 10, 2020
- International Business Machines Corporation
- Avery Francois
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION SCHEDULING DURING EXECUTION IN A PROCESSOR
- Publication number 20200371810
- Publication date Nov 26, 2020
- International Business Machines Corporation
- Cedric Lichtenau
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORE INSTRUCTION TO STORE INSTRUCTION DEPENDENCY
- Publication number 20200301706
- Publication date Sep 24, 2020
- International Business Machines Corporation
- Edward Malley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MAKING PRECISE OPERAND-STORE-COMPARE PREDICTIONS TO AVOID FALSE DEP...
- Publication number 20200301710
- Publication date Sep 24, 2020
- International Business Machines Corporation
- Gregory William Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POST COMPLETION EXECUTION IN AN OUT-OF-ORDER PROCESSOR DESIGN
- Publication number 20200285482
- Publication date Sep 10, 2020
- International Business Machines Corporation
- Avery Francois
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMPRECISE REGISTER DEPENDENCY TRACKING
- Publication number 20200285478
- Publication date Sep 10, 2020
- International Business Machines Corporation
- Jonathan Hsieh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OFFSET-BASED MECHANISM FOR STORAGE IN GLOBAL COMPLETION TABLES
- Publication number 20200272468
- Publication date Aug 27, 2020
- International Business Machines Corporation
- AVERY FRANCOIS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADJUSTING THREAD BALANCING IN RESPONSE TO DISRUPTIVE COMPLEX INSTRU...
- Publication number 20200264920
- Publication date Aug 20, 2020
- International Business Machines Corporation
- Avery Francois
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORE HIT MULTIPLE LOAD SIDE REGISTER FOR OPERAND STORE COMPARE
- Publication number 20200264885
- Publication date Aug 20, 2020
- International Business Machines Corporation
- Yair Fried
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WRITE POWER OPTIMIZATION FOR HARDWARE EMPLOYING PIPE-BASED DUPLICAT...
- Publication number 20200257572
- Publication date Aug 13, 2020
- International Business Machines Corporation
- RICHARD JOSEPH BRANCIFORTE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SLICE-BASED ALLOCATION HISTORY BUFFER
- Publication number 20200225957
- Publication date Jul 16, 2020
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REGISTER DEALLOCATION IN A PROCESSING SYSTEM
- Publication number 20200159535
- Publication date May 21, 2020
- International Business Machines Corporation
- James Bonanno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INFINITE PROCESSOR THREAD BALANCING
- Publication number 20200073670
- Publication date Mar 5, 2020
- International Business Machines Corporation
- Gregory W. Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE MISS THREAD BALANCING
- Publication number 20190227932
- Publication date Jul 25, 2019
- International Business Machines Corporation
- Gregory W. Alexander
- G06 - COMPUTING CALCULATING COUNTING

Gregory William Alexander

Person

Patents Grantslast 30 patents

Load reissuing using an alternate issue queue

Decentralized hot cache line tracking fairness mechanism

Invalidity protection for shared cache lines

Shadow pointer directory in an inclusive hierarchical cache

Hot line fairness mechanism favoring software forward progress

Final cache directory state indication

Cache management using cache scope designation

Preemptive tracking of remote requests for decentralized hot cache...

Preventing extraneous messages when exiting core recovery

Multiprocessor system cache management with non-authority designation

Special tracking pool enhancement for core local cache address inva...

Lateral persistence directory states

Multiple copy scoping bits for cache memory

Slice-based allocation history buffer

Instruction scheduling during execution in a processor

Identifying microarchitectural security vulnerabilities using simul...

Post completion execution in an out-of-order processor design

Comparing load instruction address fields to store instruction addr...

Store hit multiple load side register for preventing a subsequent s...

Write power optimization for hardware employing pipe-based duplicat...

Store instruction to store instruction dependency

Adjusting thread balancing in response to disruptive complex instru...

Offset-based mechanism for storage in global completion tables

Cache miss thread balancing

Accounting for multiple pipeline depths in processor instrumentation

Post completion execution in an out-of-order processor design

Making precise operand-store-compare predictions to avoid false dep...

Slice-based allocation history buffer

Infinite processor thread balancing

Imprecise register dependency tracking

Patents Applicationslast 30 patents

DEADLOCK AND HANG AVOIDANCE IN A LARGE DISTRIBUTED COMPUTER SYSTEM

PROCESSOR CROSS-CORE CACHE LINE CONTENTION MANAGEMENT

CROSS-CORE INVALIDATION SNAPSHOT MANAGEMENT

LOAD REISSUING USING AN ALTERNATE ISSUE QUEUE

CACHE MANAGEMENT USING CACHE SCOPE DESIGNATION

PREEMPTIVE TRACKING OF REMOTE REQUESTS FOR DECENTRALIZED HOT CACHE...

SHADOW POINTER DIRECTORY IN AN INCLUSIVE HIERARCHICAL CACHE

BIDIRECTIONAL RING-BASED INTERCONNECTION NETWORKS FOR MULTIPROCESSORS

MULTIPROCESSOR SYSTEM CACHE MANAGEMENT WITH NON-AUTHORITY DESIGNATION

HOT LINE FAIRNESS MECHANISM FAVORING SOFTWARE FORWARD PROGRESS

DECENTRALIZED HOT CACHE LINE TRACKING FAIRNESS MECHANISM

FINAL CACHE DIRECTORY STATE INDICATION

SPECIAL TRACKING POOL ENHANCEMENT FOR CORE LOCAL CACHE ADDRESS INVA...

LATERAL PERSISTENCE DIRECTORY STATES

POST COMPLETION EXECUTION IN AN OUT-OF-ORDER PROCESSOR DESIGN

IDENTIFYING MICROARCHITECTURAL SECURITY VULNERABILITIES USING SIMUL...

ACCOUNTING FOR MULTIPLE PIPELINE DEPTHS IN PROCESSOR INSTRUMENTATION

INSTRUCTION SCHEDULING DURING EXECUTION IN A PROCESSOR

STORE INSTRUCTION TO STORE INSTRUCTION DEPENDENCY

MAKING PRECISE OPERAND-STORE-COMPARE PREDICTIONS TO AVOID FALSE DEP...

POST COMPLETION EXECUTION IN AN OUT-OF-ORDER PROCESSOR DESIGN

IMPRECISE REGISTER DEPENDENCY TRACKING

OFFSET-BASED MECHANISM FOR STORAGE IN GLOBAL COMPLETION TABLES

ADJUSTING THREAD BALANCING IN RESPONSE TO DISRUPTIVE COMPLEX INSTRU...

STORE HIT MULTIPLE LOAD SIDE REGISTER FOR OPERAND STORE COMPARE

WRITE POWER OPTIMIZATION FOR HARDWARE EMPLOYING PIPE-BASED DUPLICAT...

SLICE-BASED ALLOCATION HISTORY BUFFER

REGISTER DEALLOCATION IN A PROCESSING SYSTEM

INFINITE PROCESSOR THREAD BALANCING

CACHE MISS THREAD BALANCING