Gunes Aybay

Person

Burlingame, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Reduced pin system interface
- Patent number 6,088,761
- Issue date Jul 11, 2000
- Sun Microsystems, Inc.
- Gunes Aybay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for controlling data, address, and enable buse...
- Patent number 6,012,116
- Issue date Jan 4, 2000
- Sun Microsystems, Inc.
- Gunes Aybay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for arbitrating transactions requiring multipl...
- Patent number 6,003,102
- Issue date Dec 14, 1999
- Sun Microsystems, Inc.
- Gunes Aybay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed modular internal microprocessor bus system
- Patent number 6,003,104
- Issue date Dec 14, 1999
- Sun Microsystems, Inc.
- Gunes Aybay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Auxiliary translation lookaside buffer for assisting in accessing d...
- Patent number 5,860,146
- Issue date Jan 12, 1999
- Sun Microsystems, Inc.
- Sanjay Vishin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for efficient self testing of on-chip memory
- Patent number 5,751,729
- Issue date May 12, 1998
- Sun Microsystems, Inc.
- Gunes Aybay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for efficient self testing of on-chip memory
- Patent number 5,677,913
- Issue date Oct 14, 1997
- Sun Microsystems, Inc.
- Gunes Aybay
- G06 - COMPUTING CALCULATING COUNTING

Gunes Aybay

Person

Patents Grantslast 30 patents

Reduced pin system interface

Apparatus and method for controlling data, address, and enable buse...

Apparatus and method for arbitrating transactions requiring multipl...

High speed modular internal microprocessor bus system

Auxiliary translation lookaside buffer for assisting in accessing d...

Method and apparatus for efficient self testing of on-chip memory

Method and apparatus for efficient self testing of on-chip memory