GUNNAR GAUBATZ

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method, apparatus and system for modular on-die coherent interconne...
- Patent number 9,921,989
- Issue date Mar 20, 2018
- Intel Corporation
- Krishnakumar Ganapathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient hardware architecture for a S1 S-box in a ZUC cipher
- Patent number 9,025,766
- Issue date May 5, 2015
- Intel Corporation
- Krzysztof Jankowski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Modular reduction using folding
- Patent number 8,229,109
- Issue date Jul 24, 2012
- Intel Corporation
- William C. Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cryptographic system, method and multiplier
- Patent number 8,073,892
- Issue date Dec 6, 2011
- Intel Corporation
- Wajdi K. Feghali
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware accelerator
- Patent number 8,020,142
- Issue date Sep 13, 2011
- Intel Corporation
- Gilbert M. Wolrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplying two numbers
- Patent number 7,930,337
- Issue date Apr 19, 2011
- Intel Corporation
- William C. Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for simultaneous modular exponentiations
- Patent number 7,925,011
- Issue date Apr 12, 2011
- Intel Corporation
- Vinodh Gopal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Determining message residue using a set of polynomials
- Patent number 7,827,471
- Issue date Nov 2, 2010
- Intel Corporation
- William C. Hasenplaugh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for merging tables
- Patent number 7,801,299
- Issue date Sep 21, 2010
- Intel Corporation
- Gunnar Gaubatz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for multi-precision division
- Patent number 7,738,657
- Issue date Jun 15, 2010
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for cryptography processing units and multiplier
- Patent number 7,725,624
- Issue date May 25, 2010
- Intel Corporation
- Wajdi K. Feghali
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Executing instruction for processing by ALU accessing different sco...
- Patent number 7,475,229
- Issue date Jan 6, 2009
- Intel Corporation
- Wajdi K. Feghali
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD, APPARATUS AND SYSTEM FOR MODULAR ON-DIE COHERENT INTERCONNECT
- Publication number 20160012010
- Publication date Jan 14, 2016
- Krishnakumar GANAPATHY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT HARDWARE ARCHITECTURE FOR A S1 S-BOX IN A ZUC CIPHER
- Publication number 20140270152
- Publication date Sep 18, 2014
- KRZYSZTOF JANKOWSKI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CRYPTOGRAPHIC SYSTEM, METHOD AND MULTIPLIER
- Publication number 20110264720
- Publication date Oct 27, 2011
- Wajdi Feghali
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for providing an area-efficient large unsigned...
- Publication number 20110106872
- Publication date May 5, 2011
- William Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hardware Accelerator
- Publication number 20080148024
- Publication date Jun 19, 2008
- Intel Corporation
- Gilbert M. Wolrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for Simultaneous Modular Exponentiations
- Publication number 20080144811
- Publication date Jun 19, 2008
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Carry/Borrow Handling
- Publication number 20080148011
- Publication date Jun 19, 2008
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Determining message residue using a set of polynomials
- Publication number 20080092020
- Publication date Apr 17, 2008
- William C. Hasenplaugh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TECHNIQUES FOR MERGING TABLES
- Publication number 20080075278
- Publication date Mar 27, 2008
- Gunnar Gaubatz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEM AND METHOD FOR MULTI-PRECISION DIVISION
- Publication number 20080069337
- Publication date Mar 20, 2008
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cryptography processing units and multiplier
- Publication number 20080013715
- Publication date Jan 17, 2008
- Wajdi K. Feghali
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Modular reduction using folding
- Publication number 20070297601
- Publication date Dec 27, 2007
- William C. Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mulptiplying two numbers
- Publication number 20070299899
- Publication date Dec 27, 2007
- William C. Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable processing unit providing concurrent datapath operatio...
- Publication number 20070192571
- Publication date Aug 16, 2007
- Wajdi K. Feghali
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Exponent windowing
- Publication number 20070192626
- Publication date Aug 16, 2007
- Wajdi K. Feghali
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable processing unit having multiple scopes
- Publication number 20070174372
- Publication date Jul 26, 2007
- Wajdi K. Feghali
- G06 - COMPUTING CALCULATING COUNTING

GUNNAR GAUBATZ

Person

Patents Grantslast 30 patents

Method, apparatus and system for modular on-die coherent interconne...

Efficient hardware architecture for a S1 S-box in a ZUC cipher

Modular reduction using folding

Cryptographic system, method and multiplier

Hardware accelerator

Multiplying two numbers

Method for simultaneous modular exponentiations

Determining message residue using a set of polynomials

Techniques for merging tables

System and method for multi-precision division

System and method for cryptography processing units and multiplier

Executing instruction for processing by ALU accessing different sco...

Patents Applicationslast 30 patents

METHOD, APPARATUS AND SYSTEM FOR MODULAR ON-DIE COHERENT INTERCONNECT

EFFICIENT HARDWARE ARCHITECTURE FOR A S1 S-BOX IN A ZUC CIPHER

CRYPTOGRAPHIC SYSTEM, METHOD AND MULTIPLIER

Method and apparatus for providing an area-efficient large unsigned...

Hardware Accelerator

Method for Simultaneous Modular Exponentiations

Carry/Borrow Handling

Determining message residue using a set of polynomials

TECHNIQUES FOR MERGING TABLES

SYSTEM AND METHOD FOR MULTI-PRECISION DIVISION

Cryptography processing units and multiplier

Modular reduction using folding

Mulptiplying two numbers

Programmable processing unit providing concurrent datapath operatio...

Exponent windowing

Programmable processing unit having multiple scopes