Gus Yeung

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Pulse stretcher circuitry
- Patent number 11,588,477
- Issue date Feb 21, 2023
- ARM Limited
- Shri Sagar Dwivedi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pulse stretcher circuitry
- Patent number 10,873,324
- Issue date Dec 22, 2020
- ARM Limited
- Shri Sagar Dwivedi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer implemented system and method for generating a layout of a...
- Patent number 10,796,053
- Issue date Oct 6, 2020
- ARM Limited
- Paul de Dood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer implemented system and method for generating a layout of a...
- Patent number 10,083,269
- Issue date Sep 25, 2018
- ARM Limited
- Paul De Dood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Port modes for use with memory
- Patent number 10,049,709
- Issue date Aug 14, 2018
- ARM Limited
- Gus Yeung
- G11 - INFORMATION STORAGE
Information Patent Grant
Location-based optimization for memory systems
- Patent number 10,020,031
- Issue date Jul 10, 2018
- ARM Limited
- Yew Keong Chong
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuitry using write assist voltage boost
- Patent number 9,741,410
- Issue date Aug 22, 2017
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with multiple write ports
- Patent number 9,721,624
- Issue date Aug 1, 2017
- ARM Limited
- Gus Yeung
- G11 - INFORMATION STORAGE
Information Patent Grant
Retention voltages for integrated circuits
- Patent number 9,620,200
- Issue date Apr 11, 2017
- ARM Limited
- Sanjay Mangal
- G11 - INFORMATION STORAGE
Information Patent Grant
Access suppression in a memory device
- Patent number 9,600,179
- Issue date Mar 21, 2017
- ARM Limited
- Yew Keong Chong
- G11 - INFORMATION STORAGE
Information Patent Grant
Low power input gating
- Patent number 9,542,986
- Issue date Jan 10, 2017
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and method of controlling leakage current within such...
- Patent number 9,171,634
- Issue date Oct 27, 2015
- ARM Limited
- Bo Zheng
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuitry using write assist voltage boost
- Patent number 9,142,266
- Issue date Sep 22, 2015
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory access control in a memory device
- Patent number 9,111,596
- Issue date Aug 18, 2015
- ARM Limited
- Sriram Thyagarajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated level shifting latch circuit and method of operation of...
- Patent number 9,069,652
- Issue date Jun 30, 2015
- ARM Limited
- Gus Yeung
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and method of operation of such a memory device
- Patent number 8,971,133
- Issue date Mar 3, 2015
- ARM Limited
- Bo Zheng
- G11 - INFORMATION STORAGE
Information Patent Grant
Combinatorial circuit and method of operation of such a combinatori...
- Patent number 8,963,609
- Issue date Feb 24, 2015
- ARM Limited
- Gus Yeung
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory having power saving mode
- Patent number 8,947,968
- Issue date Feb 3, 2015
- ARM Limited
- Wang-Kun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Ternary content addressable memory
- Patent number 8,848,412
- Issue date Sep 30, 2014
- ARM Limited
- Gus Yeung
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of generating a layout of an integrated circuit comprising b...
- Patent number 8,645,893
- Issue date Feb 4, 2014
- ARM Limited
- Gus Yeung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Word line and power conductor within a metal layer of a memory cell
- Patent number 8,582,340
- Issue date Nov 12, 2013
- ARM Limited
- Yew Keong Chong
- G11 - INFORMATION STORAGE
Information Patent Grant
Write assist in a dual write line semiconductor memory
- Patent number 8,582,389
- Issue date Nov 12, 2013
- ARM Limited
- Hemangi Umakant Gajjewar
- G11 - INFORMATION STORAGE
Information Patent Grant
Power supply detection circuitry and method
- Patent number 8,479,033
- Issue date Jul 2, 2013
- ARM Limited
- Hemangi Umakant Gajjewar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reducing current leakage in a semiconductor device
- Patent number 8,456,199
- Issue date Jun 4, 2013
- ARM Limited
- Gus Yeung
- G05 - CONTROLLING REGULATING
Information Patent Grant
Controlling voltage levels applied to access devices when accessing...
- Patent number 8,355,276
- Issue date Jan 15, 2013
- ARM Limited
- Sachin Satish Idgunji
- G11 - INFORMATION STORAGE
Information Patent Grant
Power control of an integrated circuit memory
- Patent number 8,218,391
- Issue date Jul 10, 2012
- ARM Limited
- Martin Jay Kinkade
- G11 - INFORMATION STORAGE
Information Patent Grant
Assisting write operations to data storage cells
- Patent number 8,045,402
- Issue date Oct 25, 2011
- ARM Limited
- Gus Yeung
- G11 - INFORMATION STORAGE
Information Patent Grant
Supporting scan functions within memories
- Patent number 8,045,401
- Issue date Oct 25, 2011
- ARM Limited
- Yew Keong Chong
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit memory with word line driving helper circuits
- Patent number 8,014,226
- Issue date Sep 6, 2011
- ARM Limited
- Gus Yeung
- G11 - INFORMATION STORAGE
Information Patent Grant
ROM array
- Patent number 7,940,546
- Issue date May 10, 2011
- ARM Limited
- Sriram Thyagarajan
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Pulse Stretcher Circuitry
- Publication number 20210111711
- Publication date Apr 15, 2021
- ARM Limited
- Shri Sagar Dwivedi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Pulse Stretcher Circuitry
- Publication number 20200014373
- Publication date Jan 9, 2020
- ARM Limited
- Shri Sagar Dwivedi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Computer Implemented System and Method for Generating a Layout of a...
- Publication number 20190026417
- Publication date Jan 24, 2019
- ARM Limited
- Paul de Dood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTER IMPLEMENTED SYSTEM AND METHOD FOR GENERATING A LAYOUT OF A...
- Publication number 20180225402
- Publication date Aug 9, 2018
- ARM Limited
- Paul DE DOOD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Port Modes for Use With Memory
- Publication number 20170194046
- Publication date Jul 6, 2017
- ARM Limited
- Gus Yeung
- G11 - INFORMATION STORAGE
Information Patent Application
Location-Based Optimization for Memory Systems
- Publication number 20170117022
- Publication date Apr 27, 2017
- ARM Limited
- Yew Keong Chong
- G11 - INFORMATION STORAGE
Information Patent Application
Low Power Input Gating
- Publication number 20160343420
- Publication date Nov 24, 2016
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY WITH MULTIPLE WRITE PORTS
- Publication number 20160180896
- Publication date Jun 23, 2016
- ARM Limited
- Gus YEUNG
- G11 - INFORMATION STORAGE
Information Patent Application
ACCESS SUPPRESSION IN A MEMORY DEVICE
- Publication number 20160034403
- Publication date Feb 4, 2016
- ARM Limited
- Yew Keong Chong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Circuitry Using Write Assist Voltage Boost
- Publication number 20160005448
- Publication date Jan 7, 2016
- ARM Limited
- Andy Wangkun CHEN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUITRY USING WRITE ASSIST VOLTAGE BOOST
- Publication number 20150138901
- Publication date May 21, 2015
- ARM Limited
- Andy Wangkun CHEN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND METHOD OF OPERATION OF SUCH A MEMORY DEVICE
- Publication number 20150085586
- Publication date Mar 26, 2015
- ARM Limited
- Bo ZHENG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY ACCESS CONTROL IN A MEMORY DEVICE
- Publication number 20150049568
- Publication date Feb 19, 2015
- ARM Limited
- Sriram THYAGARAJAN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY HAVING POWER SAVING MODE
- Publication number 20150009772
- Publication date Jan 8, 2015
- ARM Limited
- Wang-Kun CHEN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND METHOD OF CONTROLLING LEAKAGE CURRENT WITHIN SUCH...
- Publication number 20140269091
- Publication date Sep 18, 2014
- Bo ZHENG
- G11 - INFORMATION STORAGE
Information Patent Application
COMBINATORIAL CIRCUIT AND METHOD OF OPERATION OF SUCH A COMBINATORI...
- Publication number 20140247081
- Publication date Sep 4, 2014
- Gus YEUNG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INTEGRATED LEVEL SHIFTING LATCH CIRCUIT AND METHOD OF OPERATION OF...
- Publication number 20140250278
- Publication date Sep 4, 2014
- ARM Limited
- Gus YEUNG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF GENERATING A LAYOUT OF AN INTEGRATED CIRCUIT COMPRISING B...
- Publication number 20140115554
- Publication date Apr 24, 2014
- ARM Limited
- Gus YEUNG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WORD LINE AND POWER CONDUCTOR WITHIN A METAL LAYER OF A MEMORY CELL
- Publication number 20130182484
- Publication date Jul 18, 2013
- ARM Limited
- Yew Keong CHONG
- G11 - INFORMATION STORAGE
Information Patent Application
Write assist in a dual write line semiconductor memory
- Publication number 20120320694
- Publication date Dec 20, 2012
- Hemangi Umakant Gajjewar
- G11 - INFORMATION STORAGE
Information Patent Application
Power control of an integrated circuit memory
- Publication number 20120002499
- Publication date Jan 5, 2012
- Martin Jay Kinkade
- G11 - INFORMATION STORAGE
Information Patent Application
Power supply detection circuitry and method
- Publication number 20110314317
- Publication date Dec 22, 2011
- Hemangi Umakant Gajjewar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Reducing current leakage in a semiconductor device
- Publication number 20110187438
- Publication date Aug 4, 2011
- ARM Limited
- Gus Yeung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated circuit memory with word line driving helper circuits
- Publication number 20110149674
- Publication date Jun 23, 2011
- Gus Yeung
- G11 - INFORMATION STORAGE
Information Patent Application
Controlling voltage levels applied to access devices when accessing...
- Publication number 20110122712
- Publication date May 26, 2011
- ARM Limited
- Sachin Satish Idgunji
- G11 - INFORMATION STORAGE
Information Patent Application
Supporting scan functions within memories
- Publication number 20110072323
- Publication date Mar 24, 2011
- ARM Limited
- Yew Keong Chong
- G11 - INFORMATION STORAGE
Information Patent Application
Assisting write operations to data storage cells
- Publication number 20100329044
- Publication date Dec 30, 2010
- ARM Limited
- Gus Yeung
- G11 - INFORMATION STORAGE
Information Patent Application
ROM array
- Publication number 20100195365
- Publication date Aug 5, 2010
- ARM Limited
- Sriram Thyagarajan
- G11 - INFORMATION STORAGE
Information Patent Application
Access collision within a multiport memory
- Publication number 20090129194
- Publication date May 21, 2009
- ARM Limited
- David Anthony New
- G11 - INFORMATION STORAGE
Information Patent Application
Memory clock generator having multiple clock modes
- Publication number 20090103391
- Publication date Apr 23, 2009
- ARM Limited
- Gus Yeung
- G11 - INFORMATION STORAGE

Person

Patents Grantslast 30 patents

Pulse stretcher circuitry

Pulse stretcher circuitry

Computer implemented system and method for generating a layout of a...

Computer implemented system and method for generating a layout of a...

Port modes for use with memory

Location-based optimization for memory systems

Memory circuitry using write assist voltage boost

Memory with multiple write ports

Retention voltages for integrated circuits

Access suppression in a memory device

Low power input gating

Memory device and method of controlling leakage current within such...

Memory circuitry using write assist voltage boost

Memory access control in a memory device

Integrated level shifting latch circuit and method of operation of...

Memory device and method of operation of such a memory device

Combinatorial circuit and method of operation of such a combinatori...

Memory having power saving mode

Ternary content addressable memory

Method of generating a layout of an integrated circuit comprising b...

Word line and power conductor within a metal layer of a memory cell

Write assist in a dual write line semiconductor memory

Power supply detection circuitry and method

Reducing current leakage in a semiconductor device

Controlling voltage levels applied to access devices when accessing...

Power control of an integrated circuit memory

Assisting write operations to data storage cells

Supporting scan functions within memories

Integrated circuit memory with word line driving helper circuits

ROM array

Patents Applicationslast 30 patents

Pulse Stretcher Circuitry

Pulse Stretcher Circuitry

Computer Implemented System and Method for Generating a Layout of a...

COMPUTER IMPLEMENTED SYSTEM AND METHOD FOR GENERATING A LAYOUT OF A...

Port Modes for Use With Memory

Location-Based Optimization for Memory Systems

Low Power Input Gating

MEMORY WITH MULTIPLE WRITE PORTS

ACCESS SUPPRESSION IN A MEMORY DEVICE

Memory Circuitry Using Write Assist Voltage Boost

MEMORY CIRCUITRY USING WRITE ASSIST VOLTAGE BOOST

MEMORY DEVICE AND METHOD OF OPERATION OF SUCH A MEMORY DEVICE

MEMORY ACCESS CONTROL IN A MEMORY DEVICE

MEMORY HAVING POWER SAVING MODE

MEMORY DEVICE AND METHOD OF CONTROLLING LEAKAGE CURRENT WITHIN SUCH...

COMBINATORIAL CIRCUIT AND METHOD OF OPERATION OF SUCH A COMBINATORI...

INTEGRATED LEVEL SHIFTING LATCH CIRCUIT AND METHOD OF OPERATION OF...

METHOD OF GENERATING A LAYOUT OF AN INTEGRATED CIRCUIT COMPRISING B...

WORD LINE AND POWER CONDUCTOR WITHIN A METAL LAYER OF A MEMORY CELL

Write assist in a dual write line semiconductor memory

Power control of an integrated circuit memory

Power supply detection circuitry and method

Reducing current leakage in a semiconductor device

Integrated circuit memory with word line driving helper circuits

Controlling voltage levels applied to access devices when accessing...

Supporting scan functions within memories

Assisting write operations to data storage cells

ROM array

Access collision within a multiport memory

Memory clock generator having multiple clock modes