Hai Quang Pham

Person

Hartfield, PA, US

People

Patents Grantslast 30 patents

Information Patent Grant
High-reliability memory
- Patent number 8,468,419
- Issue date Jun 18, 2013
- LSI Corporation
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with error correction based on automatic logic inversion
- Patent number 8,365,044
- Issue date Jan 29, 2013
- Agere Systems Inc.
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with phase distribution circuit for controlling relat...
- Patent number 8,284,622
- Issue date Oct 9, 2012
- LSI Corporation
- Donald Albert Evans
- G11 - INFORMATION STORAGE
Information Patent Grant
Tracking circuit for reducing faults in a memory
- Patent number 8,125,842
- Issue date Feb 28, 2012
- Agere Systems Inc.
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Grant
Process and temperature tolerant non-volatile memory
- Patent number 8,059,472
- Issue date Nov 15, 2011
- Agere Systems Inc.
- Dennis Dudeck
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit having a memory with process-voltage-temperature...
- Patent number 7,948,819
- Issue date May 24, 2011
- Agere Systems Inc.
- Mathew R. Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for increasing yield in a memory device
- Patent number 7,940,594
- Issue date May 10, 2011
- Agere Systems Inc.
- Richard Bruce Dell
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with reduced buffer current during power-down mode
- Patent number 7,933,155
- Issue date Apr 26, 2011
- Agere Systems Inc.
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier with redundancy
- Patent number 7,898,887
- Issue date Mar 1, 2011
- Agere Systems Inc.
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit having reduced power consumption
- Patent number 7,848,172
- Issue date Dec 7, 2010
- Agere Systems Inc.
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Grant
Word line driver circuit with reduced leakage
- Patent number 7,826,301
- Issue date Nov 2, 2010
- Agere Systems Inc.
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Grant
Process and temperature tolerant non-volatile memory
- Patent number 7,755,948
- Issue date Jul 13, 2010
- Agere Systems Inc.
- Dennis Dudeck
- G11 - INFORMATION STORAGE
Information Patent Grant
Reduced leakage driver circuit and memory device employing same
- Patent number 7,633,830
- Issue date Dec 15, 2009
- Agere Systems Inc.
- Donald Albert Evans
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell for content-addressable memory
- Patent number 7,558,095
- Issue date Jul 7, 2009
- Agere Systems Inc.
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for reducing leakage current in a read only me...
- Patent number 7,460,424
- Issue date Dec 2, 2008
- Agere Systems Inc.
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Grant
Accelerated single-ended sensing for a memory circuit
- Patent number 7,433,254
- Issue date Oct 7, 2008
- Agere Systems Inc.
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Grant
Accelerated searching for content-addressable memory
- Patent number 7,391,633
- Issue date Jun 24, 2008
- Agere Systems Inc.
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Grant
Layout techniques for memory circuitry
- Patent number 7,324,364
- Issue date Jan 29, 2008
- Agere Systems Inc.
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Grant
Decoding techniques for read-only memory
- Patent number 7,301,828
- Issue date Nov 27, 2007
- Agere Systems Inc.
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for reducing leakage current in a read only me...
- Patent number 7,177,212
- Issue date Feb 13, 2007
- Agere Systems Inc.
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for reducing leakage current in a read only me...
- Patent number 7,085,149
- Issue date Aug 1, 2006
- Agere Systems Inc.
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for reducing leakage current in a read only me...
- Patent number 7,042,779
- Issue date May 9, 2006
- Agere Systems Inc.
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Grant
Read-only memory architecture
- Patent number 6,879,509
- Issue date Apr 12, 2005
- Agere Systems, INC
- Donald A. Evans
- G11 - INFORMATION STORAGE
Information Patent Grant
Built-in self-test and self-repair methods and devices for computer...
- Patent number 6,397,349
- Issue date May 28, 2002
- Agere Systems Guardian Corp.
- Frank P. Higgins
- G11 - INFORMATION STORAGE
Information Patent Grant
Built-in redundancy architecture for computer memories
- Patent number 6,222,783
- Issue date Apr 24, 2001
- Agere Systems Guardian Corp.
- Goh Komoriya
- G11 - INFORMATION STORAGE
Information Patent Grant
Built-in redundancy architecture for computer memories
- Patent number 6,072,735
- Issue date Jun 6, 2000
- Lucent Technologies, Inc.
- Goh Komoriya
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Memory Device with Phase Distribution Circuit for Controlling Relat...
- Publication number 20120075946
- Publication date Mar 29, 2012
- Donald Albert Evans
- G11 - INFORMATION STORAGE
Information Patent Application
Process and Temperature Tolerant Non-Volatile Memory
- Publication number 20110222357
- Publication date Sep 15, 2011
- Agerre Systems, Inc.
- Dennis Dudeck
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Cell Using Leakage Current Storage Mechanism
- Publication number 20110157964
- Publication date Jun 30, 2011
- Richard J. McPartland
- G11 - INFORMATION STORAGE
Information Patent Application
High-Reliability Memory
- Publication number 20110055660
- Publication date Mar 3, 2011
- Dennis E. Dudeck
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Tracking Circuit for Reducing Faults in a Memory
- Publication number 20100246293
- Publication date Sep 30, 2010
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Application
Method and Apparatus for Increasing Yield in a Memory Device
- Publication number 20100238751
- Publication date Sep 23, 2010
- Agere Systems Inc.
- Richard Bruce Dell
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Device with Reduced Buffer Current During Power-Down Mode
- Publication number 20100220534
- Publication date Sep 2, 2010
- Agere Systems Inc.
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Application
Word Line Driver Circuit with Reduced Leakage
- Publication number 20100165778
- Publication date Jul 1, 2010
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Application
Sense Amplifier with Redundancy
- Publication number 20100157707
- Publication date Jun 24, 2010
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Circuit Having Reduced Power Consumption
- Publication number 20100128549
- Publication date May 27, 2010
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Application
Process and Temperature Tolerant Non-Volatile Memory
- Publication number 20100046291
- Publication date Feb 25, 2010
- Agere Systems, Inc.
- Dennis Dudeck
- G11 - INFORMATION STORAGE
Information Patent Application
Reduced Leakage Driver Circuit and Memory Device Employing Same
- Publication number 20090141580
- Publication date Jun 4, 2009
- Donald Albert Evans
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Cell for Content-Addressable Memory
- Publication number 20080273361
- Publication date Nov 6, 2008
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Device with Error Correction Based on Automatic Logic Inversion
- Publication number 20080263385
- Publication date Oct 23, 2008
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT HAVING A MEMORY WITH PROCESS-VOLTAGE-TEMPERATURE...
- Publication number 20080117702
- Publication date May 22, 2008
- Agere Systems Inc.
- Matthew R. Henry
- G11 - INFORMATION STORAGE
Information Patent Application
Accelerated Single-Ended Sensing for a Memory Circuit
- Publication number 20080025103
- Publication date Jan 31, 2008
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Application
Accelerated Searching for Content-Addressable Memory
- Publication number 20080025119
- Publication date Jan 31, 2008
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Application
Layout techniques for read-only memory and the like
- Publication number 20070201257
- Publication date Aug 30, 2007
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Application
DECODING TECHNIQUES FOR READ-ONLY MEMORY
- Publication number 20070201281
- Publication date Aug 30, 2007
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Application
Method And Apparatus For Reducing Leakage Current In A Read Only Me...
- Publication number 20070103959
- Publication date May 10, 2007
- Agere Systems Inc.
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for reducing leakage current in a read only me...
- Publication number 20050162951
- Publication date Jul 28, 2005
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for reducing leakage current in a read only me...
- Publication number 20050162941
- Publication date Jul 28, 2005
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for reducing leakage current in a read only me...
- Publication number 20050162952
- Publication date Jul 28, 2005
- Dennis E. Dudeck
- G11 - INFORMATION STORAGE
Information Patent Application
Read-only memory architecture
- Publication number 20040233693
- Publication date Nov 25, 2004
- Agere Systems, Inc.
- Donald A. Evans
- G11 - INFORMATION STORAGE
Information Patent Application
BUILT-IN-SELF-TEST AND SELF-REPAIR METHODS AND DEVICES FOR COMPUTER...
- Publication number 20020019957
- Publication date Feb 14, 2002
- AGERE SYSTEMS GUARDIAN CORP.
- FRANK P. HIGGINS
- G11 - INFORMATION STORAGE

Hai Quang Pham

Person

Patents Grantslast 30 patents

High-reliability memory

Memory device with error correction based on automatic logic inversion

Memory device with phase distribution circuit for controlling relat...

Tracking circuit for reducing faults in a memory

Process and temperature tolerant non-volatile memory

Integrated circuit having a memory with process-voltage-temperature...

Method and apparatus for increasing yield in a memory device

Memory device with reduced buffer current during power-down mode

Sense amplifier with redundancy

Memory circuit having reduced power consumption

Word line driver circuit with reduced leakage

Process and temperature tolerant non-volatile memory

Reduced leakage driver circuit and memory device employing same

Memory cell for content-addressable memory

Method and apparatus for reducing leakage current in a read only me...

Accelerated single-ended sensing for a memory circuit

Accelerated searching for content-addressable memory

Layout techniques for memory circuitry

Decoding techniques for read-only memory

Method and apparatus for reducing leakage current in a read only me...

Method and apparatus for reducing leakage current in a read only me...

Method and apparatus for reducing leakage current in a read only me...

Read-only memory architecture

Built-in self-test and self-repair methods and devices for computer...

Built-in redundancy architecture for computer memories

Built-in redundancy architecture for computer memories

Patents Applicationslast 30 patents

Memory Device with Phase Distribution Circuit for Controlling Relat...

Process and Temperature Tolerant Non-Volatile Memory

Memory Cell Using Leakage Current Storage Mechanism

High-Reliability Memory

Tracking Circuit for Reducing Faults in a Memory

Method and Apparatus for Increasing Yield in a Memory Device

Memory Device with Reduced Buffer Current During Power-Down Mode

Word Line Driver Circuit with Reduced Leakage

Sense Amplifier with Redundancy

Memory Circuit Having Reduced Power Consumption

Process and Temperature Tolerant Non-Volatile Memory

Reduced Leakage Driver Circuit and Memory Device Employing Same

Memory Cell for Content-Addressable Memory

Memory Device with Error Correction Based on Automatic Logic Inversion

INTEGRATED CIRCUIT HAVING A MEMORY WITH PROCESS-VOLTAGE-TEMPERATURE...

Accelerated Single-Ended Sensing for a Memory Circuit

Accelerated Searching for Content-Addressable Memory

Layout techniques for read-only memory and the like

DECODING TECHNIQUES FOR READ-ONLY MEMORY

Method And Apparatus For Reducing Leakage Current In A Read Only Me...

Method and apparatus for reducing leakage current in a read only me...

Method and apparatus for reducing leakage current in a read only me...

Method and apparatus for reducing leakage current in a read only me...

Read-only memory architecture

BUILT-IN-SELF-TEST AND SELF-REPAIR METHODS AND DEVICES FOR COMPUTER...