Haiming Yu

Person

Pleasanton, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
First-in-first-out memory with dual memory banks
- Patent number 9,501,407
- Issue date Nov 22, 2016
- Altera Corporation
- Ray Ruey-Hsien Hu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Negative bit line driver circuitry
- Patent number 9,256,266
- Issue date Feb 9, 2016
- Altera Corporation
- Haiming Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory arbitration circuitry
- Patent number 8,867,303
- Issue date Oct 21, 2014
- Altera Corporation
- Ray Ruey-Hsien Hu
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable addressing circuitry for increasing memory yield
- Patent number 8,483,006
- Issue date Jul 9, 2013
- Altera Corporation
- Hao-Yuan Howard Chou
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual port PLD embedded memory block to support read-before-write in...
- Patent number 8,238,191
- Issue date Aug 7, 2012
- Altera Corporation
- Haiming Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Reading and writing data to a memory cell in one clock cycle
- Patent number 7,839,713
- Issue date Nov 23, 2010
- Altera Corporation
- Haiming Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Using dedicated read output path to reduce unregistered read access...
- Patent number 7,715,271
- Issue date May 11, 2010
- Altera Corporation
- Haiming Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual port random-access-memory circuitry
- Patent number RE41325
- Issue date May 11, 2010
- Altera Corporation
- Haiming Yu
- 365 - Static information storage and retrieval
Information Patent Grant
Write margin calculation tool for dual-port random-access-memory ci...
- Patent number 7,689,941
- Issue date Mar 30, 2010
- Altera Corporation
- Teng Chow Ooi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual port PLD embedded memory block to support read-before-write in...
- Patent number 7,679,971
- Issue date Mar 16, 2010
- Altera Corporation
- Haiming Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Configurable random-access-memory circuitry
- Patent number 7,639,557
- Issue date Dec 29, 2009
- Altera Corporation
- Hao-Yuan Howard Chou
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual port PLD embedded memory block to support read-before-write in...
- Patent number 7,499,365
- Issue date Mar 3, 2009
- Altera Corporation
- Haiming Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual port random-access-memory circuitry
- Patent number 7,471,588
- Issue date Dec 30, 2008
- Altera Corporation
- Haiming Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Using dedicated read output path to reduce unregistered read access...
- Patent number 7,414,916
- Issue date Aug 19, 2008
- Altera Corporation
- Haiming Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual-port memory array using shared write drivers and read sense am...
- Patent number 7,289,372
- Issue date Oct 30, 2007
- Altera Corporation
- Haiming Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Divisible true dual port memory system supporting simple dual port...
- Patent number 7,269,089
- Issue date Sep 11, 2007
- Altera Corporation
- Haiming Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for memory block initialization
- Patent number 7,221,185
- Issue date May 22, 2007
- Altera Corporation
- Haiming Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual port PLD embedded memory block to support read-before-write in...
- Patent number 7,206,251
- Issue date Apr 17, 2007
- Altera Corporation
- Haiming Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Divisible true dual port memory system supporting simple dual port...
- Patent number 7,130,238
- Issue date Oct 31, 2006
- Altera Corporation
- Haiming Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual port memory array using shared write drivers and read sense am...
- Patent number 7,110,304
- Issue date Sep 19, 2006
- Altera Corporation
- Haiming Yu
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY ARBITRATION CIRCUITRY
- Publication number 20130073763
- Publication date Mar 21, 2013
- Ray Ruey-Hsien Hu
- G11 - INFORMATION STORAGE
Information Patent Application
Dual Port PLD Embedded Memory Block to Support Read-Before-Write in...
- Publication number 20100157691
- Publication date Jun 24, 2010
- Haiming Yu
- G11 - INFORMATION STORAGE
Information Patent Application
Dual port random-access-memory circuitry
- Publication number 20070258313
- Publication date Nov 8, 2007
- Haiming Yu
- G11 - INFORMATION STORAGE

Person

Patents Grantslast 30 patents

First-in-first-out memory with dual memory banks

Negative bit line driver circuitry

Memory arbitration circuitry

Programmable addressing circuitry for increasing memory yield

Dual port PLD embedded memory block to support read-before-write in...

Reading and writing data to a memory cell in one clock cycle

Using dedicated read output path to reduce unregistered read access...

Dual port random-access-memory circuitry

Write margin calculation tool for dual-port random-access-memory ci...

Dual port PLD embedded memory block to support read-before-write in...

Configurable random-access-memory circuitry

Dual port PLD embedded memory block to support read-before-write in...

Dual port random-access-memory circuitry

Using dedicated read output path to reduce unregistered read access...

Dual-port memory array using shared write drivers and read sense am...

Divisible true dual port memory system supporting simple dual port...

Method and apparatus for memory block initialization

Dual port PLD embedded memory block to support read-before-write in...

Divisible true dual port memory system supporting simple dual port...

Dual port memory array using shared write drivers and read sense am...

Patents Applicationslast 30 patents

MEMORY ARBITRATION CIRCUITRY

Dual Port PLD Embedded Memory Block to Support Read-Before-Write in...

Dual port random-access-memory circuitry