Hamid Savoj

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Los Altos, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Representing the design of a sub-module in a hierarchical integrate...
- Patent number 7,103,863
- Issue date Sep 5, 2006
- Magma Design Automation, Inc.
- Michael A. Riepe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reduction of cross-talk noise in VLSI circuits
- Patent number 7,058,907
- Issue date Jun 6, 2006
- Magma Design Automation, Inc.
- Emre Tuncer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for generating design constraints for modules in a hierarchi...
- Patent number 6,845,494
- Issue date Jan 18, 2005
- Magma Design Automation, Inc.
- Timothy M. Burks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Timing optimization in presence of interconnect delays
- Patent number 6,553,338
- Issue date Apr 22, 2003
- Magma Design Automation, Inc.
- Premal V. Buch
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Reduction of cross-talk noise in VLSI circuits
- Publication number 20040205678
- Publication date Oct 14, 2004
- Emre Tuncer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Representing the design of a sub-module in a hierarchical integrate...
- Publication number 20040078767
- Publication date Apr 22, 2004
- Timothy M. Burks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for generating design constraints for modules in a hierarchi...
- Publication number 20030009734
- Publication date Jan 9, 2003
- Timothy M. Burks
- G06 - COMPUTING CALCULATING COUNTING