Han-Ming Sheng

Person

Hsin-chu, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Damascene method employing multi-layer etch stop layer
- Patent number 6,734,116
- Issue date May 11, 2004
- Taiwan Semiconductor Manufacturing Co., Ltd
- Cheng-Cheng Guo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System to position defect location on production wafers
- Patent number 6,477,265
- Issue date Nov 5, 2002
- Taiwan Semiconductor Manufacturing Company
- Han-Ming Sheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arc coating on mask quartz plate to avoid alignment error on steppe...
- Patent number 6,344,365
- Issue date Feb 5, 2002
- Taiwan Semiconductor Manufacturing Company
- Han-Ming Sheng
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Frame layout to monitor overlay performance of chip composed of mul...
- Patent number 6,330,355
- Issue date Dec 11, 2001
- Taiwan Semiconductor Manufacturing Company
- Chia-Hsiang Chen
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Overlay matching method which eliminates alignment induced errors a...
- Patent number 6,309,944
- Issue date Oct 30, 2001
- Taiwan Semiconductor Manufacturing Company
- Han-Ming Sheng
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method for accurately calibrating a constant-angle reflection-inter...
- Patent number 6,252,670
- Issue date Jun 26, 2001
- Taiwan Semiconductor Manufacturing Company
- Han-Ming Sheng
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
Damascene method employing multi-layer etch stop layer
- Publication number 20030134521
- Publication date Jul 17, 2003
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Cheng-Cheng Guo
- H01 - BASIC ELECTRIC ELEMENTS

Han-Ming Sheng

Person

Patents Grantslast 30 patents

Damascene method employing multi-layer etch stop layer

System to position defect location on production wafers

Arc coating on mask quartz plate to avoid alignment error on steppe...

Frame layout to monitor overlay performance of chip composed of mul...

Overlay matching method which eliminates alignment induced errors a...

Method for accurately calibrating a constant-angle reflection-inter...

Patents Applicationslast 30 patents

Damascene method employing multi-layer etch stop layer