HAN SOO CHO

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San Jose, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Methods for forming three dimensional NAND structures atop a substrate
- Patent number 9,236,255
- Issue date Jan 12, 2016
- Applied Materials, Inc.
- Sang Wook Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for forming three dimensional NAND structures atop a substrate
- Patent number 8,937,021
- Issue date Jan 20, 2015
- Applied Materials, Inc.
- Han Soo Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for forming a round bottom silicon trench recess for semico...
- Patent number 8,932,947
- Issue date Jan 13, 2015
- Applied Materials, Inc.
- Joo Won Han
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD FOR IN-SITU CHAMBER CLEAN USING CARBON MONOXIDE (CO) GAS UTL...
- Publication number 20150144154
- Publication date May 28, 2015
- Applied Materials, Inc.
- Kee Young CHO
- B08 - CLEANING
Information Patent Application
METHODS FOR FORMING A ROUND BOTTOM SILICON TRENCH RECESS FOR SEMICO...
- Publication number 20150031187
- Publication date Jan 29, 2015
- Applied Materials, Inc.
- Joo Won Han
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FORMING THREE DIMENSIONAL NAND STRUCTURES ATOP A SUBSTRATE
- Publication number 20150004796
- Publication date Jan 1, 2015
- Applied Materials, Inc.
- SANG WOOK KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FORMING THREE DIMENSIONAL NAND STRUCTURES ATOP A SUBSTRATE
- Publication number 20140377959
- Publication date Dec 25, 2014
- HAN SOO CHO
- H01 - BASIC ELECTRIC ELEMENTS