Hans-Warner Tast

Person

Weil i. Schoenbuch, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Evicting cached stores
- Patent number 9,886,395
- Issue date Feb 6, 2018
- International Business Machines Corporation
- Uwe Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical cache structure and handling thereof
- Patent number 9,665,486
- Issue date May 30, 2017
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Evicting cached stores
- Patent number 9,658,967
- Issue date May 23, 2017
- International Business Machines Corporation
- Uwe Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Store cache for transactional memory
- Patent number 9,588,894
- Issue date Mar 7, 2017
- International Business Machines Corporation
- Uwe Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Store cache for transactional memory
- Patent number 9,588,893
- Issue date Mar 7, 2017
- International Business Machines Corporation
- Uwe Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical cache structure and handling thereof
- Patent number 9,563,568
- Issue date Feb 7, 2017
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for accessing cache memory
- Patent number 9,384,131
- Issue date Jul 5, 2016
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing transactional and non-transactional store observability
- Patent number 9,378,143
- Issue date Jun 28, 2016
- International Business Machines Corporation
- Khary J. Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical cache structure and handling thereof
- Patent number 9,323,673
- Issue date Apr 26, 2016
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing transactional and non-transactional store observability
- Patent number 9,298,631
- Issue date Mar 29, 2016
- International Business Machines Corporation
- Khary J. Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Handling virtual memory address synonyms in a multi-level cache hie...
- Patent number 9,274,959
- Issue date Mar 1, 2016
- GLOBALFOUNDRIES Inc.
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical cache structure and handling thereof
- Patent number 9,183,146
- Issue date Nov 10, 2015
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data caching method
- Patent number 9,075,732
- Issue date Jul 7, 2015
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Store buffer for transactional memory
- Patent number 8,977,823
- Issue date Mar 10, 2015
- International Business Machines Corporation
- Khary J. ALexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhanced wiring structure for a cache supporting auxiliary data output
- Patent number 8,891,279
- Issue date Nov 18, 2014
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data caching method
- Patent number 8,856,444
- Issue date Oct 7, 2014
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data caching method
- Patent number 8,751,749
- Issue date Jun 10, 2014
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Avoiding cross-interrogates in a streaming data optimized L1 cache
- Patent number 8,516,200
- Issue date Aug 20, 2013
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Handling corrupted background data in an out of order execution env...
- Patent number 8,495,452
- Issue date Jul 23, 2013
- International Business Machines Corporation
- Michael Fee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Verification of logic circuit designs using dynamic clock gating
- Patent number 8,302,043
- Issue date Oct 30, 2012
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method to verify an implemented coherency algorithm of a multi proc...
- Patent number 8,108,197
- Issue date Jan 31, 2012
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache bounded reference counting
- Patent number 8,082,399
- Issue date Dec 20, 2011
- International Business Machines Corporation
- Eberhard Pasch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for a multi-level virtual/real cache system with...
- Patent number 8,041,894
- Issue date Oct 18, 2011
- International Business Machines Corporation
- Barry W. Krumm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlling an unreliable data transfer in a data channel
- Patent number 8,015,451
- Issue date Sep 6, 2011
- International Business Machines Corporation
- Christian Habermann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Generating a local clock domain using dynamic controls
- Patent number 8,001,411
- Issue date Aug 16, 2011
- International Business Machines Corporation
- Sean Michael Carey
- G11 - INFORMATION STORAGE
Information Patent Grant
Method, system, and computer program product for handling errors in...
- Patent number 7,987,384
- Issue date Jul 26, 2011
- International Business Machines Corporation
- Christian Jacobi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electronic circuit for implementing a permutation operation
- Patent number 7,783,690
- Issue date Aug 24, 2010
- International Business Machines Corporation
- Jens Leenstra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performance of a cache by detecting cache lines that have been reused
- Patent number 7,552,286
- Issue date Jun 23, 2009
- International Business Machines Corporation
- Gordon T. Davis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for adaptively mapping an instruction cache
- Patent number 7,469,332
- Issue date Dec 23, 2008
- International Business Machines Corporation
- Claude Basso
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performance of a cache by detecting cache lines that have been reused
- Patent number 7,380,065
- Issue date May 27, 2008
- International Business Machines Corporation
- Gordon T. Davis
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
HIERARCHICAL CACHE STRUCTURE AND HANDLING THEREOF
- Publication number 20160224467
- Publication date Aug 4, 2016
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORE CACHE FOR TRANSACTIONAL MEMORY
- Publication number 20160132434
- Publication date May 12, 2016
- International Business Machines Corporation
- Uwe Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORE CACHE FOR TRANSACTIONAL MEMORY
- Publication number 20160132431
- Publication date May 12, 2016
- International Business Machines Corporation
- Uwe Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EVICTING CACHED STORES
- Publication number 20160070654
- Publication date Mar 10, 2016
- International Business Machines Corporation
- Uwe Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHICAL CACHE STRUCTURE AND HANDLING THEREOF
- Publication number 20160062905
- Publication date Mar 3, 2016
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EVICTING CACHED STORES
- Publication number 20150378924
- Publication date Dec 31, 2015
- International Business Machines Corporation
- Uwe Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HANDLING VIRTUAL MEMORY ADDRESS SYNONYMS IN A MULTI-LEVEL CACHE HIE...
- Publication number 20150032964
- Publication date Jan 29, 2015
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR ACCESSING CACHE MEMORY
- Publication number 20140281238
- Publication date Sep 18, 2014
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHICAL CACHE STRUCTURE AND HANDLING THEREOF
- Publication number 20140129774
- Publication date May 8, 2014
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHICAL CACHE STRUCTURE AND HANDLING THEREOF
- Publication number 20140129773
- Publication date May 8, 2014
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enhanced Wiring Structure for a Cache Supporting Auxiliary Data Output
- Publication number 20140082290
- Publication date Mar 20, 2014
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Store Buffer for Transactional Memory
- Publication number 20140082293
- Publication date Mar 20, 2014
- International Business Machines Corporation
- Khary J. ALexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING TRANSACTIONAL AND NON-TRANSACTIONAL STORE OBSERVABILITY
- Publication number 20130339615
- Publication date Dec 19, 2013
- International Business Machines Corporation
- Khary J. Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING TRANSACTIONAL AND NON-TRANSACTIONAL STORE OBSERVABILITY
- Publication number 20130339616
- Publication date Dec 19, 2013
- International Business Machines Corporation
- Khary J. Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA CACHING METHOD
- Publication number 20120215983
- Publication date Aug 23, 2012
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HANDLING CORRUPTED BACKGROUND DATA IN AN OUT OF ORDER EXECUTION ENV...
- Publication number 20120210188
- Publication date Aug 16, 2012
- International Business Machines Corporation
- Michael Fee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Avoiding Cross-Interrogates in a Streaming Data Optimized L1 Cache
- Publication number 20120059996
- Publication date Mar 8, 2012
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA CACHING METHOD
- Publication number 20110307666
- Publication date Dec 15, 2011
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, System, Computer Program Product, and Data Processing Progr...
- Publication number 20110066988
- Publication date Mar 17, 2011
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD TO VERIFY AN IMPLEMENTED COHERENCY ALGORITHM OF A MULTI PROC...
- Publication number 20100146210
- Publication date Jun 10, 2010
- International Business Machines Corporation
- CHRISTIAN HABERMANN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods of Cache Bounded Reference Counting
- Publication number 20100030968
- Publication date Feb 4, 2010
- International Business Machines Corporation
- Eberhard Pasch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR A MULTI-LEVEL VIRTUAL/REAL CACHE SYSTEM WITH...
- Publication number 20090216949
- Publication date Aug 27, 2009
- International Business Machines Corporation
- Barry W. Krumm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR HANDLING ERRORS IN...
- Publication number 20090204766
- Publication date Aug 13, 2009
- International Business Machines Corporation
- Christian Jacobi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and an Apparatus for Controlling an Unreliable Data Transfer...
- Publication number 20090193308
- Publication date Jul 30, 2009
- International Business Machines Corporation
- Christian Habermann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Generating a Local Clock Domain Using Dynamic Controls
- Publication number 20090083569
- Publication date Mar 26, 2009
- International Business Machines Corporation
- Sean Michael Carey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERFORMANCE OF A CACHE BY DETECTING CACHE LINES THAT HAVE BEEN REUSED
- Publication number 20080168236
- Publication date Jul 10, 2008
- International Business Machines Corporation
- Gordon T. Davis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Electronic circuit for implementing a permutation operation
- Publication number 20070011220
- Publication date Jan 11, 2007
- Jens Leenstra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Performance of a cache by detecting cache lines that have been reused
- Publication number 20060224830
- Publication date Oct 5, 2006
- IBM Corporation
- Gordon T. Davis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and methods for adaptively mapping an instruction cache
- Publication number 20060200615
- Publication date Sep 7, 2006
- Claude Basso
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Checkpointing a superscalar, out-of-order processor for error recovery
- Publication number 20030005265
- Publication date Jan 2, 2003
- International Business Machines Corporation
- Harry Stefan Barowski
- G06 - COMPUTING CALCULATING COUNTING

Hans-Warner Tast

Person

Patents Grantslast 30 patents

Evicting cached stores

Hierarchical cache structure and handling thereof

Evicting cached stores

Store cache for transactional memory

Store cache for transactional memory

Hierarchical cache structure and handling thereof

Systems and methods for accessing cache memory

Managing transactional and non-transactional store observability

Hierarchical cache structure and handling thereof

Managing transactional and non-transactional store observability

Handling virtual memory address synonyms in a multi-level cache hie...

Hierarchical cache structure and handling thereof

Data caching method

Store buffer for transactional memory

Enhanced wiring structure for a cache supporting auxiliary data output

Data caching method

Data caching method

Avoiding cross-interrogates in a streaming data optimized L1 cache

Handling corrupted background data in an out of order execution env...

Verification of logic circuit designs using dynamic clock gating

Method to verify an implemented coherency algorithm of a multi proc...

Cache bounded reference counting

Method and system for a multi-level virtual/real cache system with...

Controlling an unreliable data transfer in a data channel

Generating a local clock domain using dynamic controls

Method, system, and computer program product for handling errors in...

Electronic circuit for implementing a permutation operation

Performance of a cache by detecting cache lines that have been reused

Systems and methods for adaptively mapping an instruction cache

Performance of a cache by detecting cache lines that have been reused

Patents Applicationslast 30 patents

HIERARCHICAL CACHE STRUCTURE AND HANDLING THEREOF

STORE CACHE FOR TRANSACTIONAL MEMORY

STORE CACHE FOR TRANSACTIONAL MEMORY

EVICTING CACHED STORES

HIERARCHICAL CACHE STRUCTURE AND HANDLING THEREOF

EVICTING CACHED STORES

HANDLING VIRTUAL MEMORY ADDRESS SYNONYMS IN A MULTI-LEVEL CACHE HIE...

SYSTEMS AND METHODS FOR ACCESSING CACHE MEMORY

HIERARCHICAL CACHE STRUCTURE AND HANDLING THEREOF

HIERARCHICAL CACHE STRUCTURE AND HANDLING THEREOF

Enhanced Wiring Structure for a Cache Supporting Auxiliary Data Output

Store Buffer for Transactional Memory

MANAGING TRANSACTIONAL AND NON-TRANSACTIONAL STORE OBSERVABILITY

MANAGING TRANSACTIONAL AND NON-TRANSACTIONAL STORE OBSERVABILITY

DATA CACHING METHOD

HANDLING CORRUPTED BACKGROUND DATA IN AN OUT OF ORDER EXECUTION ENV...

Avoiding Cross-Interrogates in a Streaming Data Optimized L1 Cache

DATA CACHING METHOD

Method, System, Computer Program Product, and Data Processing Progr...

METHOD TO VERIFY AN IMPLEMENTED COHERENCY ALGORITHM OF A MULTI PROC...

Methods of Cache Bounded Reference Counting

METHOD AND SYSTEM FOR A MULTI-LEVEL VIRTUAL/REAL CACHE SYSTEM WITH...

METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR HANDLING ERRORS IN...

Method and an Apparatus for Controlling an Unreliable Data Transfer...

Generating a Local Clock Domain Using Dynamic Controls

PERFORMANCE OF A CACHE BY DETECTING CACHE LINES THAT HAVE BEEN REUSED

Electronic circuit for implementing a permutation operation

Performance of a cache by detecting cache lines that have been reused

Systems and methods for adaptively mapping an instruction cache

Checkpointing a superscalar, out-of-order processor for error recovery