Harold F. Webster

Person

Scotia, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Ceramic-to-conducting-lead hermetic seal
- Patent number 5,273,203
- Issue date Dec 28, 1993
- General Electric Company
- Harold F. Webster
- C04 - CEMENTS CONCRETE ARTIFICIAL STONE CERAMICS REFRACTORIES
Information Patent Grant
Ceramic-to-conducting-lead hermetic seal
- Patent number 5,241,216
- Issue date Aug 31, 1993
- General Electric Company
- Harold F. Webster
- C04 - CEMENTS CONCRETE ARTIFICIAL STONE CERAMICS REFRACTORIES
Information Patent Grant
Enhanced direct bond structure
- Patent number 4,996,116
- Issue date Feb 26, 1991
- General Electric Company
- Harold F. Webster
- B32 - LAYERED PRODUCTS
Information Patent Grant
Method of self-packaging an IC chip
- Patent number 4,914,812
- Issue date Apr 10, 1990
- General Electric Company
- Harold F. Webster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self packaging chip mount
- Patent number 4,908,736
- Issue date Mar 13, 1990
- General Electric Company
- Harold F. Webster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reduction of cross talk in interconnecting conductors
- Patent number 4,831,497
- Issue date May 16, 1989
- General Electric Company
- Harold F. Webster
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Multilayer circuit board fabricated from silicon
- Patent number 4,803,450
- Issue date Feb 7, 1989
- General Electric Company
- James F. Burgess
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self packaging chip mount
- Patent number 4,796,156
- Issue date Jan 3, 1989
- General Electric Company
- Harold F. Webster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Silicon packages for power semiconductor devices
- Patent number 4,745,455
- Issue date May 17, 1988
- General Electric Company
- Homer H. Glascock
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Printed circuit wiring board having a doped semi-conductive region...
- Patent number 4,672,335
- Issue date Jun 9, 1987
- General Electric Company
- Harold F. Webster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thyristor packaging system
- Patent number 4,574,299
- Issue date Mar 4, 1986
- General Electric Company
- Homer H. Glascock
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low loss, multilevel silicon circuit board
- Patent number 4,541,035
- Issue date Sep 10, 1985
- General Electric Company
- Richard O. Carlson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of thermo-compression diffusion bonding together metal surfaces
- Patent number 4,444,352
- Issue date Apr 24, 1984
- General Electric Company
- Homer H. Glascock
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of forming a conductor pattern including fine conductor runs...
- Patent number 4,413,766
- Issue date Nov 8, 1983
- General Electric Company
- Harold F. Webster
- C04 - CEMENTS CONCRETE ARTIFICIAL STONE CERAMICS REFRACTORIES
Information Patent Grant
Cooled semiconductor power module including structured strain buffe...
- Patent number 4,392,153
- Issue date Jul 5, 1983
- General Electric Company
- Homer H. Glascock
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for writing on archival target and target produced thereby
- Patent number 4,370,590
- Issue date Jan 25, 1983
- General Electric Company
- Harold F. Webster
- G11 - INFORMATION STORAGE
Information Patent Grant
Ultrasonic bond testing of semiconductor devices
- Patent number 4,366,713
- Issue date Jan 4, 1983
- General Electric Company
- Robert S. Gilmore
- G01 - MEASURING TESTING
Information Patent Grant
Fluid cooled solar powered photovoltaic cell
- Patent number 4,361,717
- Issue date Nov 30, 1982
- General Electric Company
- Robert S. Gilmore
- F24 - HEATING RANGES VENTILATING
Information Patent Grant
Method for writing on archival target and target produced thereby
- Patent number 4,287,572
- Issue date Sep 1, 1981
- General Electric Company
- Harold F. Webster
- G11 - INFORMATION STORAGE
Information Patent Grant
Photoflash lamp array having high voltage shorting type flash lamps...
- Patent number 4,118,758
- Issue date Oct 3, 1978
- General Electric Company
- Dominic A. Cusano
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Lead bonding method
- Patent number 4,098,452
- Issue date Jul 4, 1978
- General Electric Company
- Harold F. Webster
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Switching devices for photoflash unit
- Patent number 3,990,833
- Issue date Nov 9, 1976
- General Electric Company
- Fred F. Holub
- C08 - ORGANIC MACROMOLECULAR COMPOUNDS THEIR PREPARATION OR CHEMICAL WORKING-...

Harold F. Webster

Person

Patents Grantslast 30 patents

Ceramic-to-conducting-lead hermetic seal

Ceramic-to-conducting-lead hermetic seal

Enhanced direct bond structure

Method of self-packaging an IC chip

Self packaging chip mount

Reduction of cross talk in interconnecting conductors

Multilayer circuit board fabricated from silicon

Self packaging chip mount

Silicon packages for power semiconductor devices

Printed circuit wiring board having a doped semi-conductive region...

Thyristor packaging system

Low loss, multilevel silicon circuit board

Method of thermo-compression diffusion bonding together metal surfaces

Method of forming a conductor pattern including fine conductor runs...

Cooled semiconductor power module including structured strain buffe...

Method for writing on archival target and target produced thereby

Ultrasonic bond testing of semiconductor devices

Fluid cooled solar powered photovoltaic cell

Method for writing on archival target and target produced thereby

Photoflash lamp array having high voltage shorting type flash lamps...

Lead bonding method

Switching devices for photoflash unit