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Harold N. Scholz
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Allentwon, PA, US
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Patents Grants
last 30 patents
Information
Patent Grant
Distributed front-end FIFO for source-synchronous interfaces with n...
Patent number
7,808,855
Issue date
Oct 5, 2010
Lattice Semiconductor Corporation
Fulong Zhang
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Programmable interconnect for reconfigurable system-on-chip
Patent number
7,650,545
Issue date
Jan 19, 2010
Agere Systems Inc.
Miron Abramovici
G01 - MEASURING TESTING
Information
Patent Grant
Hysteresis-based processing for applications such as signal bias mo...
Patent number
7,616,029
Issue date
Nov 10, 2009
Lattice Semiconductor Corporation
William B. Andrews
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Distributed front-end FIFO for source-synchronized interfaces with...
Patent number
7,573,770
Issue date
Aug 11, 2009
Lattice Semiconductor Corporation
Fulong Zhang
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Efficient configuration of daisy-chained programmable logic devices
Patent number
7,554,357
Issue date
Jun 30, 2009
Lattice Semiconductor Corporation
Zheng (Jeff) Chen
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Digital I/O timing control
Patent number
7,495,495
Issue date
Feb 24, 2009
Lattice Semiconductor Corporation
Fulong Zhang
G11 - INFORMATION STORAGE
Information
Patent Grant
Low static current drain logic circuit
Patent number
7,429,875
Issue date
Sep 30, 2008
Lattice Semiconductor Corporation
Larry R. Fenstermaker
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Bitline twisting scheme for multiport memory
Patent number
7,414,913
Issue date
Aug 19, 2008
Lattice Semiconductor Corporation
Larry Fenstermaker
G11 - INFORMATION STORAGE
Information
Patent Grant
Output clock phase-alignment circuit
Patent number
7,253,674
Issue date
Aug 7, 2007
Lattice Semicondutor Corporation
Phillip L. Johnson
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Address isolation for user-defined configuration memory in programm...
Patent number
7,196,963
Issue date
Mar 27, 2007
Lattice Semiconductor Corporation
Larry R. Fenstermaker
G11 - INFORMATION STORAGE
Information
Patent Grant
Noise-shielding, switch-controlled load circuitry for oscillators a...
Patent number
7,132,903
Issue date
Nov 7, 2006
Lattice Semiconductor Corporation
Phillip Johnson
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Adaptive input logic for phase adjustments
Patent number
7,034,596
Issue date
Apr 25, 2006
Lattice Semiconductor Corporation
William B. Andrews
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Programmable I/O interfaces for FPGAs and other PLDs
Patent number
7,009,423
Issue date
Mar 7, 2006
Lattice Semiconductor Corporation
William B. Andrews
G11 - INFORMATION STORAGE
Information
Patent Grant
Programmable I/O interfaces for FPGAs and other PLDs
Patent number
6,952,115
Issue date
Oct 4, 2005
Lattice Semiconductor Corporation
William B. Andrews
G11 - INFORMATION STORAGE
Information
Patent Grant
Programmable I/O structure for FPGAs and the like having reduced pa...
Patent number
6,943,583
Issue date
Sep 13, 2005
Lattice Semiconductor Corporation
William B. Andrews
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Memory access via serial memory interface
Patent number
6,903,574
Issue date
Jun 7, 2005
Lattice Semiconductor Corporation
Zheng (Jeff) Chen
G11 - INFORMATION STORAGE
Information
Patent Grant
Method and apparatus for controlling signal distribution in an elec...
Patent number
6,873,187
Issue date
Mar 29, 2005
Lattice Semiconductor Corporation
William Andrews
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Noise reduction techniques for programmable input/output circuits
Patent number
6,812,869
Issue date
Nov 2, 2004
Lattice Semiconductor Corporation
Arifur Rahman
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Programmable common mode termination for input/output circuits
Patent number
6,700,823
Issue date
Mar 2, 2004
Lattice Semiconductor Corporation
Arifur Rahman
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Signal distribution scheme in field programmable gate array (FPGA)...
Patent number
6,486,705
Issue date
Nov 26, 2002
Lattice Semiconductor Corporation
William B. Andrews
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Multi-functional I/O buffers in a field programmable gate array (FPGA)
Patent number
6,480,026
Issue date
Nov 12, 2002
Lattice Semiconductor Corporation
William B. Andrews
G06 - COMPUTING CALCULATING COUNTING
Patents Applications
last 30 patents
Information
Patent Application
Low static current drain logic circuit
Publication number
20080143380
Publication date
Jun 19, 2008
Larry R. Fenstermaker
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Application
Efficient configuration of daisy-chained programmable logic devices
Publication number
20070182445
Publication date
Aug 9, 2007
Zheng (Jeff) Chen
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Digital I/O timing control
Publication number
20070109880
Publication date
May 17, 2007
Fulong Zhang
G11 - INFORMATION STORAGE
Information
Patent Application
Memory access via serial memory interface
Publication number
20050024085
Publication date
Feb 3, 2005
Zheng (Jeff) Chen
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Application
Adaptive input logic for phase adjustments
Publication number
20040155690
Publication date
Aug 12, 2004
Lattice Semiconductor Corporation
William B. Andrews
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Application
Signal distribution scheme in field programmable gate array (FPGA)...
Publication number
20020003445
Publication date
Jan 10, 2002
William B. Andrews
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Multi-functional I/O buffers in a field programmable gate array (FPGA)
Publication number
20020003435
Publication date
Jan 10, 2002
William Burr Andrews
G06 - COMPUTING CALCULATING COUNTING