Harry J. LEVINSON

Person

Saratoga, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Assist cuts disposed in dummy lines to improve metal signal cuts in...
- Patent number 9,905,552
- Issue date Feb 27, 2018
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods of design rule checking of circuit designs
- Patent number 9,798,852
- Issue date Oct 24, 2017
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods of generating circuit layouts that are to be manufactured u...
- Patent number 9,613,177
- Issue date Apr 4, 2017
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Pellicle with aerogel support frame
- Patent number 9,547,232
- Issue date Jan 17, 2017
- GLOBALFOUNDRIES Inc.
- Harry J. Levinson
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Self-aligned double patterning process for metal routing
- Patent number 9,536,778
- Issue date Jan 3, 2017
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Middle of-line architecture for dense library layout using M0 hand-...
- Patent number 9,437,588
- Issue date Sep 6, 2016
- GLOBALFOUNDRIES Inc.
- Jia Zeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MOL architecture enabling ultra-regular cross couple
- Patent number 9,431,300
- Issue date Aug 30, 2016
- GLOBALFOUNDRIES Inc.
- Jia Zeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Mask-aware routing and resulting device
- Patent number 9,330,221
- Issue date May 3, 2016
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods of patterning line-type features using a multiple patternin...
- Patent number 9,287,131
- Issue date Mar 15, 2016
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for off-grid routing structures utilizing self aligned doubl...
- Patent number 9,147,653
- Issue date Sep 29, 2015
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for semiconductor wafer fabrication utilizing a cleaning sub...
- Patent number 9,093,481
- Issue date Jul 28, 2015
- GLOBALFOUNDRIES, INC.
- Harry J. Levinson
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Methods of generating circuit layouts that are to be manufactured u...
- Patent number 8,966,412
- Issue date Feb 24, 2015
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods of generating circuit layouts that are to be manufactured u...
- Patent number 8,954,913
- Issue date Feb 10, 2015
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for off-grid routing structures utilizing self aligned doubl...
- Patent number 8,921,225
- Issue date Dec 30, 2014
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cut mask aware contact enclosure rule for grating and cut patternin...
- Patent number 8,918,746
- Issue date Dec 23, 2014
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Via insertion in integrated circuit (IC) designs
- Patent number 8,843,869
- Issue date Sep 23, 2014
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self-aligned double patterning via enclosure design
- Patent number 8,839,168
- Issue date Sep 16, 2014
- GLOBALFOUNDRIES Inc.
- Jongwook Kye
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of forming semiconductor device with multiple level patterning
- Patent number 8,815,748
- Issue date Aug 26, 2014
- Advanced Micro Devices, Inc.
- Thomas Ingolf Wallow
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Methods of forming contacts for semiconductor devices using a local...
- Patent number 8,809,184
- Issue date Aug 19, 2014
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Optical polarizer with nanotube array
- Patent number 8,792,161
- Issue date Jul 29, 2014
- GLOBALFOUNDRIES Inc.
- Bruno M. LaFontaine
- G02 - OPTICS
Information Patent Grant
Layout designs with via routing structures
- Patent number 8,741,763
- Issue date Jun 3, 2014
- GLOBALFOUNDRIES Inc.
- Yuansheng Ma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a high resolution resist pattern on a semiconduc...
- Patent number 8,586,269
- Issue date Nov 19, 2013
- GLOBALFOUNDRIES Inc.
- Uzodinma Okoroanyanwu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Shape characterization with elliptic fourier descriptor for contact...
- Patent number 8,367,430
- Issue date Feb 5, 2013
- GLOBALFOUNDRIES, INC.
- Yuansheng Ma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fluorine-passivated reticles for use in lithography and methods for...
- Patent number 8,338,061
- Issue date Dec 25, 2012
- Advanced Micro Devices, Inc.
- Harry J. Levinson
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Methods for fabricating a photolithographic mask and for fabricatin...
- Patent number 8,324,106
- Issue date Dec 4, 2012
- GLOBALFOUNDRIES, INC.
- Lei Yuan
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method of forming semiconductor device
- Patent number 8,236,592
- Issue date Aug 7, 2012
- GLOBALFOUNDRIES Inc.
- Ryoung-han Kim
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method for determining low-noise power spectral density for charact...
- Patent number 8,067,252
- Issue date Nov 29, 2011
- Advanced Micro Devices, Inc.
- Yuansheng Ma
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method and system for detecting existence of an undesirable particl...
- Patent number 7,986,146
- Issue date Jul 26, 2011
- GLOBALFOUNDRIES Inc.
- Harry J. Levinson
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Fluorine-passivated reticles for use in lithography and methods for...
- Patent number 7,985,513
- Issue date Jul 26, 2011
- Advanced Micro Devices, Inc.
- Harry J. Levinson
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Stabilization of deep ultraviolet photoresist
- Patent number 7,851,136
- Issue date Dec 14, 2010
- GLOBALFOUNDRIES Inc.
- Harry J. Levinson
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY

Patents Applicationslast 30 patents

Information Patent Application
ASSIST CUTS DISPOSED IN DUMMY LINES TO IMPROVE METAL SIGNAL CUTS IN...
- Publication number 20180053757
- Publication date Feb 22, 2018
- GLOBALFOUNDRIES INC.
- Lei YUAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEXTURING OF SILICON SURFACE WITH DIRECT-SELF ASSEMBLY PATTERNING
- Publication number 20180053662
- Publication date Feb 22, 2018
- GLOBALFOUNDRIES INC.
- Bartlomiej Jan PAWLAK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD, APPARATUS, AND SYSTEM FOR IMPROVED CELL DESIGN HAVING UNIDI...
- Publication number 20170323902
- Publication date Nov 9, 2017
- GLOBALFOUNDRIES INC.
- Jia Zeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF DESIGN RULE CHECKING OF CIRCUIT DESIGNS
- Publication number 20160378906
- Publication date Dec 29, 2016
- GLOBALFOUNDRIES INC.
- Lei YUAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELF-ALIGNED DOUBLE PATTERNING PROCESS FOR METAL ROUTING
- Publication number 20160293478
- Publication date Oct 6, 2016
- GLOBALFOUNDRIES INC.
- Lei YUAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PELLICLE WITH AEROGEL SUPPORT FRAME
- Publication number 20160161857
- Publication date Jun 9, 2016
- GLOBALFOUNDRIES INC.
- Harry J. Levinson
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
MASK-AWARE ROUTING AND RESULTING DEVICE
- Publication number 20150339428
- Publication date Nov 26, 2015
- GLOBAL FOUNDRIES Inc.
- Lei YUAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS OF PATTERNING LINE-TYPE FEATURES USING A MULTIPLE PATTERNIN...
- Publication number 20150243515
- Publication date Aug 27, 2015
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS OF GENERATING CIRCUIT LAYOUTS THAT ARE TO BE MANUFACTURED U...
- Publication number 20150113484
- Publication date Apr 23, 2015
- GLOBALFOUNDRIES INC.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR OFF-GRID ROUTING STRUCTURES UTILIZING SELF ALIGNED DOUBL...
- Publication number 20150028489
- Publication date Jan 29, 2015
- GLOBALFOUNDRIES INC.
- Lei YUAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VIA INSERTION IN INTEGRATED CIRCUIT (IC) DESIGNS
- Publication number 20140282345
- Publication date Sep 18, 2014
- GLOBALFOUNDRIES INC.
- Lei YUAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR OFF-GRID ROUTING STRUCTURES UTILIZING SELF ALIGNED DOUBL...
- Publication number 20140225270
- Publication date Aug 14, 2014
- GLOBALFOUNDRIES INC.
- Lei YUAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED DOUBLE PATTERNING VIA ENCLOSURE DESIGN
- Publication number 20140208285
- Publication date Jul 24, 2014
- GLOBALFOUNDRIES INC.
- Jongwook Kye
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS OF FORMING CONTACTS FOR SEMICONDUCTOR DEVICES USING A LOCAL...
- Publication number 20130295756
- Publication date Nov 7, 2013
- GLOBALFOUNDRIES INC.
- Lei Yuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LAYOUT DESIGNS WITH VIA ROUTING STRUCTURES
- Publication number 20130292772
- Publication date Nov 7, 2013
- GLOBALFOUNDRIES INC.
- Yuansheng Ma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FABRICATING A PHOTOLITHOGRAPHIC MASK AND FOR FABRICATIN...
- Publication number 20120252199
- Publication date Oct 4, 2012
- GLOBALFOUNDRIES INC.
- Lei YUAN
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
FLUORINE-PASSIVATED RETICLES FOR USE IN LITHOGRAPHY AND METHODS FOR...
- Publication number 20110244377
- Publication date Oct 6, 2011
- Advanced Micro Devices, Inc.
- Harry J. LEVINSON
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
SHAPE CHARACTERIZATION WITH ELLIPTIC FOURIER DESCRIPTOR FOR CONTACT...
- Publication number 20110079779
- Publication date Apr 7, 2011
- GLOBALFOUNDRIES INC.
- Yuansheng MA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS FOR UNIFORMLY OPTICALLY ANNEALING REGIONS OF A SEMICONDUCTO...
- Publication number 20100041220
- Publication date Feb 18, 2010
- Advanced Micro Devices, Inc.
- Harry J. LEVINSON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FLUORINE-PASSIVATED RETICLES FOR USE IN LITHOGRAPHY AND METHODS FOR...
- Publication number 20090239155
- Publication date Sep 24, 2009
- Advanced Micro Devices, Inc.
- Harry J. LEVINSON
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
LITHOGRAPHIC ALIGNMENT MARKS
- Publication number 20090135390
- Publication date May 28, 2009
- Advanced Micro Devices, Inc.
- Bruno La Fontaine
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method for semiconductor wafer fabrication utilizing a cleaning sub...
- Publication number 20080257383
- Publication date Oct 23, 2008
- Advanced Micro Devices, Inc.
- Harry J. Levinson
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method for forming a high resolution resist pattern on a semiconduc...
- Publication number 20080233494
- Publication date Sep 25, 2008
- Advanced Micro Devices, Inc.
- Uzodinma Okoroanyanwu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Optical polarizer with nanotube array
- Publication number 20080198453
- Publication date Aug 21, 2008
- Advanced Micro Devices, Inc.
- Bruno M. LaFontaine
- G02 - OPTICS
Information Patent Application
Method for determining low-noise power spectral density for charact...
- Publication number 20080194046
- Publication date Aug 14, 2008
- Advanced Micro Devices, Inc.
- Yuansheng Ma
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
METHOD OF FORMING SEMICONDUCTOR DEVICE
- Publication number 20080171446
- Publication date Jul 17, 2008
- Advanced Micro Devices, Inc.
- Ryoung-han Kim
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
METHOD OF FORMING SEMICONDUCTOR DEVICE WITH MULTIPLE LEVEL PATTERNING
- Publication number 20080171447
- Publication date Jul 17, 2008
- Advanced Micro Devices, Inc.
- Thomas Ingolf Wallow
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method and system for detecting existence of an undesirable particl...
- Publication number 20080124820
- Publication date May 29, 2008
- Advanced Micro Devices, Inc.
- Harry J. Levinson
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
STABILIZATION OF DEEP ULTRAVIOLET PHOTORESIST
- Publication number 20070281248
- Publication date Dec 6, 2007
- Harry J. Levinson
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method and apparatus for elimination of bubbles in immersion medium...
- Publication number 20050048223
- Publication date Mar 3, 2005
- Adam R. Pawloski
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY

Harry J. LEVINSON

Person

Patents Grantslast 30 patents

Assist cuts disposed in dummy lines to improve metal signal cuts in...

Methods of design rule checking of circuit designs

Methods of generating circuit layouts that are to be manufactured u...

Pellicle with aerogel support frame

Self-aligned double patterning process for metal routing

Middle of-line architecture for dense library layout using M0 hand-...

MOL architecture enabling ultra-regular cross couple

Mask-aware routing and resulting device

Methods of patterning line-type features using a multiple patternin...

Method for off-grid routing structures utilizing self aligned doubl...

Method for semiconductor wafer fabrication utilizing a cleaning sub...

Methods of generating circuit layouts that are to be manufactured u...

Methods of generating circuit layouts that are to be manufactured u...

Method for off-grid routing structures utilizing self aligned doubl...

Cut mask aware contact enclosure rule for grating and cut patternin...

Via insertion in integrated circuit (IC) designs

Self-aligned double patterning via enclosure design

Method of forming semiconductor device with multiple level patterning

Methods of forming contacts for semiconductor devices using a local...

Optical polarizer with nanotube array

Layout designs with via routing structures

Method for forming a high resolution resist pattern on a semiconduc...

Shape characterization with elliptic fourier descriptor for contact...

Fluorine-passivated reticles for use in lithography and methods for...

Methods for fabricating a photolithographic mask and for fabricatin...

Method of forming semiconductor device

Method for determining low-noise power spectral density for charact...

Method and system for detecting existence of an undesirable particl...

Fluorine-passivated reticles for use in lithography and methods for...

Stabilization of deep ultraviolet photoresist

Patents Applicationslast 30 patents

ASSIST CUTS DISPOSED IN DUMMY LINES TO IMPROVE METAL SIGNAL CUTS IN...

TEXTURING OF SILICON SURFACE WITH DIRECT-SELF ASSEMBLY PATTERNING

METHOD, APPARATUS, AND SYSTEM FOR IMPROVED CELL DESIGN HAVING UNIDI...

METHODS OF DESIGN RULE CHECKING OF CIRCUIT DESIGNS

SELF-ALIGNED DOUBLE PATTERNING PROCESS FOR METAL ROUTING

PELLICLE WITH AEROGEL SUPPORT FRAME

MASK-AWARE ROUTING AND RESULTING DEVICE

METHODS OF PATTERNING LINE-TYPE FEATURES USING A MULTIPLE PATTERNIN...

METHODS OF GENERATING CIRCUIT LAYOUTS THAT ARE TO BE MANUFACTURED U...

METHOD FOR OFF-GRID ROUTING STRUCTURES UTILIZING SELF ALIGNED DOUBL...

VIA INSERTION IN INTEGRATED CIRCUIT (IC) DESIGNS

METHOD FOR OFF-GRID ROUTING STRUCTURES UTILIZING SELF ALIGNED DOUBL...

SELF-ALIGNED DOUBLE PATTERNING VIA ENCLOSURE DESIGN

METHODS OF FORMING CONTACTS FOR SEMICONDUCTOR DEVICES USING A LOCAL...

LAYOUT DESIGNS WITH VIA ROUTING STRUCTURES

METHODS FOR FABRICATING A PHOTOLITHOGRAPHIC MASK AND FOR FABRICATIN...

FLUORINE-PASSIVATED RETICLES FOR USE IN LITHOGRAPHY AND METHODS FOR...

SHAPE CHARACTERIZATION WITH ELLIPTIC FOURIER DESCRIPTOR FOR CONTACT...

METHODS FOR UNIFORMLY OPTICALLY ANNEALING REGIONS OF A SEMICONDUCTO...

FLUORINE-PASSIVATED RETICLES FOR USE IN LITHOGRAPHY AND METHODS FOR...

LITHOGRAPHIC ALIGNMENT MARKS

Method for semiconductor wafer fabrication utilizing a cleaning sub...

Method for forming a high resolution resist pattern on a semiconduc...

Optical polarizer with nanotube array

Method for determining low-noise power spectral density for charact...

METHOD OF FORMING SEMICONDUCTOR DEVICE

METHOD OF FORMING SEMICONDUCTOR DEVICE WITH MULTIPLE LEVEL PATTERNING

Method and system for detecting existence of an undesirable particl...

STABILIZATION OF DEEP ULTRAVIOLET PHOTORESIST

Method and apparatus for elimination of bubbles in immersion medium...